公开(公告)号：US20230317640A1

公开(公告)日：2023-10-05

申请号：US18075878

申请日：2022-12-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Juyoun CHOI ,  Seongho SHIN

IPC: H01L23/64 ,  H01L23/498 ,  H01L25/10

CPC classification number: H01L23/64 ,  H01L23/49822 ,  H01L23/49838 ,  H01L25/105 ,  H01L2224/16227 ,  H01L24/16

Abstract: A semiconductor package is provided. The semiconductor package includes: a lower equipotential plate provided in a lower wiring layer; an upper equipotential plate provided in an upper wiring layer; a pair of differential signal wiring lines provided in a signal wiring layer that is between the lower equipotential plate and the upper equipotential plate, wherein the pair of differential signal wiring lines includes a first differential signal wiring line and a second differential signal wiring line which are spaced apart from each other and extend in parallel; and a wiring insulating layer surrounding the pair of differential signal wiring lines, and filling between the signal wiring layer, the lower wiring layer, and the upper wiring layer. The wiring insulating layer includes a first wiring insulating layer surrounding the pair of differential signal wiring lines, and a second wiring insulating layer, and the first wiring insulating layer and the second wiring insulating layer include different materials.

公开(公告)号：US20240071882A1

公开(公告)日：2024-02-29

申请号：US18366098

申请日：2023-08-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seongho SHIN ,  Sangkyu KIM ,  Juyoun CHOI

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/373 ,  H01L25/065

CPC classification number: H01L23/49822 ,  H01L23/3735 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/16 ,  H01L24/32 ,  H01L25/0655 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/32146 ,  H01L2924/1431 ,  H01L2924/1435

Abstract: A semiconductor package may include a package substrate and a silicon-free interposer. The silicon-free interposer may include a second core layer, first interposer through electrodes passing through the second core layer and connected to the first core through electrodes, and second interposer through electrodes passing through the second core layer and connected to the second core through electrodes. Diameters of the first core through electrodes may be different from diameters of the second core through electrodes, and diameters of the first interposer through electrodes may be different from diameters of the second interposer through electrodes.

公开(公告)号：US20240071893A1

公开(公告)日：2024-02-29

申请号：US18124653

申请日：2023-03-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seongho SHIN ,  Sangkyu KIM ,  Yoonseok SEO

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/552

CPC classification number: H01L23/49838 ,  H01L23/49822 ,  H01L23/552 ,  H01L24/16 ,  H01L23/49816 ,  H01L23/49866 ,  H01L2224/16227 ,  H01L2924/1434

Abstract: A package substrate includes a plurality of sequentially stacked insulating layers, a first signal line configured to transmit a first signal therethrough, and a ground line. The first signal line including a first signal via at least partially penetrating the plurality of insulating layers, a first signal pad provided at one end of the first signal via in any selected one of the insulating layers, and a first signal wiring extending from the first signal pad in the selected insulating layer. The ground line including a ground via at least partially penetrating the plurality of insulating layers, a ground pad provided at one end of the ground via in the selected insulating layer, a ground wiring extending from the ground pad in the selected insulating layer, and a ground stub extending from the ground pad toward the first signal via or the first signal pad.