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公开(公告)号:US20250024665A1
公开(公告)日:2025-01-16
申请号:US18584646
申请日:2024-02-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yong Jin LEE , Sung Won YOO , Won Sok LEE , Min Hee CHO , Si Yeon CHO
IPC: H10B12/00
Abstract: The semiconductor memory device including a bit line in a first direction on a substrate, a channel structure on the bit line, and including a first vertical part in a second direction, and a second vertical part apart from the first vertical part in the first direction and in the second direction, a back-gate electrode on the bit line on a side of the channel structure and in the second direction, a back-gate insulating film between the back-gate electrode and the channel structure, a back-gate capping film on the back-gate electrode and the back-gate insulating film, a first and second word lines between the first and the second vertical parts and in the second direction, the second word line spaced apart from the first word line in the first direction and first and second capacitors connected to the first and second vertical parts, on the first and second vertical parts.
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公开(公告)号:US20240130138A1
公开(公告)日:2024-04-18
申请号:US18483907
申请日:2023-10-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yukio HAYAKAWA , Yong Seok KIM , Bong Yong LEE , Si Yeon CHO
Abstract: A semiconductor memory device includes a cell substrate, a plurality of gate electrodes sequentially stacked on the cell substrate and extending in a first direction, first and second channel structures extending in a second direction different from the first direction and penetrating the plurality of gate electrodes, and a bit line disposed on the plurality of gate electrodes. The first and second channel structures each include a ferroelectric layer, a channel layer, a gate insulating layer and a back gate electrode, which are sequentially disposed on side walls of the plurality of gate electrodes. The first channel structure and the second channel structure are adjacent to each other in the first direction and share a bit line.
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