公开(公告)号：US10192966B2

公开(公告)日：2019-01-29

申请号：US15692560

申请日：2017-08-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunho Jung ,  Jeongyun Lee ,  Taesoon Kwon ,  Kyungseok Min ,  Geumjung Seong ,  Bora Lim ,  A-Reum Ji ,  Seungsoo Hong

IPC: H01L29/423 ,  H01L27/092 ,  H01L29/06

Abstract: A semiconductor device can include a first active pattern on a substrate, the first active pattern including a plurality of first active regions that protrude from the substrate. A second active pattern can be on the substrate including a plurality of second active regions that protrude from the substrate. A first gate electrode can include an upper portion that extends over the first active pattern at a first height and include a recessed portion that extends over the first active pattern at a second height that is lower than the first height of the first gate electrode. A second gate electrode can include an upper portion that extends over the second active pattern at a first height and include a recessed portion that extends over the second active pattern at a second height that is lower than the first height of the second gate electrode. An insulation pattern can be located between, and directly adjacent to, the recessed portion of the first gate electrode and the recessed portion of the second gate electrode, the insulation pattern electrically isolating the first and second gate electrodes from one another.