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公开(公告)号:US09929099B2
公开(公告)日:2018-03-27
申请号:US15357299
申请日:2016-11-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: VietHa Nguyen , Wookyung You , Inoue Naoya , Hak-Sun Lee , Byung-Kwon Cho , Songyi Han , Jongmin Baek , Jiwon Kang , Byunghee Kim , Young-Ju Park , Sanghoon Ahn , Jiwon Yun , Naein Lee , YoungWoo Cho
IPC: H01L23/48 , H01L23/532 , H01L23/522
CPC classification number: H01L23/53295 , H01L23/5222 , H01L23/53238 , H01L23/53266
Abstract: A semiconductor device includes an interlayer insulating layer including a first insulating layer on a substrate, and a plurality of interconnections in the first insulating layer. The interlayer insulating layer includes a first region, and a second region including an air gap. The air gap is defined between a pair of the interconnections in the second region. A top surface of the first insulating layer of the first region is lower than a top surface of at least one of the interconnections in the first region.
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公开(公告)号:US20170178949A1
公开(公告)日:2017-06-22
申请号:US15374053
申请日:2016-12-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: VietHa Nguyen , Thomas Oszinda , Jongmin Baek , Sanghoon Ahn , Byunghee Kim , Wookyung You , Naein Lee
IPC: H01L21/768 , H01L23/532 , H01L23/522
CPC classification number: H01L21/7682 , H01L21/76802 , H01L21/76832 , H01L21/76834 , H01L21/76843 , H01L21/76877 , H01L23/5222 , H01L23/5226 , H01L23/53238 , H01L23/53266 , H01L23/5329 , H01L23/53295
Abstract: A semiconductor device may include a substrate, a first interlayered insulating layer on the substrate having openings, conductive patterns provided in the openings, first to fourth insulating patterns stacked on the substrate provided with the conductive patterns, and a second interlayered insulating layer provided on the fourth insulating pattern.
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公开(公告)号:US09972528B2
公开(公告)日:2018-05-15
申请号:US15374053
申请日:2016-12-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: VietHa Nguyen , Thomas Oszinda , Jongmin Baek , Sanghoon Ahn , Byunghee Kim , Wookyung You , Naein Lee
IPC: H01L29/00 , H01L21/768 , H01L23/522 , H01L23/532
CPC classification number: H01L21/7682 , H01L21/76802 , H01L21/76832 , H01L21/76834 , H01L21/76843 , H01L21/76877 , H01L23/5222 , H01L23/5226 , H01L23/53238 , H01L23/53266 , H01L23/5329 , H01L23/53295
Abstract: A semiconductor device may include a substrate, a first interlayered insulating layer on the substrate having openings, conductive patterns provided in the openings, first to fourth insulating patterns stacked on the substrate provided with the conductive patterns, and a second interlayered insulating layer provided on the fourth insulating pattern.
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公开(公告)号:US10186485B2
公开(公告)日:2019-01-22
申请号:US15897465
申请日:2018-02-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: VietHa Nguyen , Wookyung You , Inoue Naoya , Hak-Sun Lee , Byung-Kwon Cho , Songyi Han , Jongmin Baek , Jiwon Kang , Byunghee Kim , Young-Ju Park , Sanghoon Ahn , Jiwon Yun , Naein Lee , YoungWoo Cho
IPC: H01L23/48 , H01L23/532 , H01L23/522
Abstract: A semiconductor device includes an interlayer insulating layer including a first insulating layer on a substrate, and a plurality of interconnections in the first insulating layer. The interlayer insulating layer includes a first region, and a second region including an air gap. The air gap is defined between a pair of the interconnections in the second region. A top surface of the first insulating layer of the first region is lower than a top surface of at least one of the interconnections in the first region.
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公开(公告)号:US20180174977A1
公开(公告)日:2018-06-21
申请号:US15897465
申请日:2018-02-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: VietHa Nguyen , Wookyung You , Inoue Naoya , Hak-Sun Lee , Byung-Kwon Cho , Songyi Han , Jongmin Baek , Jiwon Kang , Byunghee Kim , Young-Ju Park , Sanghoon Ahn , Jiwon Yun , Naein Lee , YoungWoo Cho
IPC: H01L23/532 , H01L23/522
CPC classification number: H01L23/53295 , H01L21/7682 , H01L21/76885 , H01L23/5222 , H01L23/528 , H01L23/53238 , H01L23/53266
Abstract: A semiconductor device includes an interlayer insulating layer including a first insulating layer on a substrate, and a plurality of interconnections in the first insulating layer. The interlayer insulating layer includes a first region, and a second region including an air gap. The air gap is defined between a pair of the interconnections in the second region. A top surface of the first insulating layer of the first region is lower than a top surface of at least one of the interconnections in the first region.
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公开(公告)号:US20170170184A1
公开(公告)日:2017-06-15
申请号:US15357299
申请日:2016-11-21
Applicant: Samsung Electronics Co., Ltd.
Inventor: VietHa Nguyen , Wookyung You , Inoue Naoya , Hak-Sun Lee , Byung-Kwon Cho , Songyi Han , Jongmin Baek , Jiwon Kang , Byunghee Kim , Young-Ju Park , Sanghoon Ahn , Jiwon Yun , Naein Lee , YoungWoo Cho
IPC: H01L27/105 , H01L29/06
CPC classification number: H01L23/53295 , H01L23/5222 , H01L23/53238 , H01L23/53266
Abstract: A semiconductor device includes an interlayer insulating layer including a first insulating layer on a substrate, and a plurality of interconnections in the first insulating layer. The interlayer insulating layer includes a first region, and a second region including an air gap. The air gap is defined between a pair of the interconnections in the second region. A top surface of the first insulating layer of the first region is lower than a top surface of at least one of the interconnections in the first region.
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