公开(公告)号：US20230066757A1

公开(公告)日：2023-03-02

申请号：US17734508

申请日：2022-05-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： WON-HYUNG SONG ,  JUNG MIN YOU ,  SEONG-JIN CHO

IPC: G11C11/4072 ,  G11C11/408 ,  G11C11/4096 ,  G11C11/4091 ,  G11C11/4093

Abstract: Disclosed is a method for accessing memory cells arranged in rows and columns. The method includes activating a specific row of the rows of the memory cells, and flipping data bits stored in memory cells of the specific row in response to determining that concentrated activation occurs at the specific row.

公开(公告)号：US20170168746A1

公开(公告)日：2017-06-15

申请号：US15371825

申请日：2016-12-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： OH-SEONG KWON ,  JINHYUN KIM ,  WON-HYUNG SONG ,  JIHYUN CHOI

IPC: G06F3/06 ,  G11C8/18

CPC classification number: G06F12/00 ,  G06F3/0604 ,  G06F3/0629 ,  G06F3/0683 ,  G06F12/02 ,  G11C5/04 ,  G11C7/1042 ,  G11C7/1057 ,  G11C8/12 ,  G11C8/18 ,  G11C11/4076 ,  G11C11/408 ,  G11C11/4093 ,  G11C2207/2209

Abstract: A semiconductor memory device includes a first memory area in the semiconductor memory device, and a second memory area in the semiconductor memory device. The second memory area is accessed independently of the first memory area based on a usage selecting signal. The first and second memory areas share command and address lines, and perform a rank interleaving operation based on the usage selecting signal.

公开(公告)号：US20170004871A1

公开(公告)日：2017-01-05

申请号：US15269170

申请日：2016-09-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JONG-HYUN SEOK ,  DO-HYUNG KIM ,  WON-HYUNG SONG ,  YONG-HO LEE

IPC: G11C11/4093

CPC classification number: G11C11/4093 ,  G11C5/04 ,  G11C7/02 ,  G11C7/10 ,  G11C2207/105

Abstract: A memory module that includes: a printed circuit board having a connecting terminal; memory chips arranged on the printed circuit board; data buffers disposed on a first surface of the printed circuit board and corresponding to the memory chips; and resistance units disposed on a second surface of the printed circuit board and corresponding to the data buffers.

Abstract translation: 一种存储模块，包括：具有连接端子的印刷电路板; 存储芯片布置在印刷电路板上; 数据缓冲器，布置在印刷电路板的第一表面上并对应于存储器芯片; 和布置在印刷电路板的第二表面上并对应于数据缓冲器的电阻单元。

公开(公告)号：US20190087364A1

公开(公告)日：2019-03-21

申请号：US16193527

申请日：2018-11-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： JIN-HYUN KIM ,  WON-HYUNG SONG

IPC: G06F13/16 ,  G11C7/10 ,  G11C5/02 ,  G11C11/4096 ,  G06F17/50 ,  G06F13/40

Abstract: Provided are a semiconductor device and a semiconductor system. A semiconductor device includes a memory cell array; a standard cell region in which first type standard cells implemented to perform a first operation for accessing the memory cell array and second type standard cells performing the first operation and having performance characteristics different from performance characteristics of the first type standard cells are arranged; and a ROM including a program that performs place and route for the standard cells arranged in the standard cell region.