MEMORY DEVICE
    1.
    发明申请

    公开(公告)号:US20250056795A1

    公开(公告)日:2025-02-13

    申请号:US18441968

    申请日:2024-02-14

    Abstract: The present disclosure relates to memory devices. An example memory device includes a memory cell region including a memory cell array is configured to store data, and an antifuse cell array including a plurality of antifuse bit lines, a plurality of antifuse word lines, and a plurality of program transistors that is electrically coupled to a first antifuse bit line among the plurality of antifuse bit lines and that are coupled in parallel with one another. The memory device includes a peripheral circuit region including an antifuse sense amplifier is configured to output one-time programmable (OTP) data stored in the plurality of program transistors.

    MEMORY DEVICE
    2.
    发明公开
    MEMORY DEVICE 审中-公开

    公开(公告)号:US20240103735A1

    公开(公告)日:2024-03-28

    申请号:US18333690

    申请日:2023-06-13

    CPC classification number: G06F3/0614 G06F3/0659 G06F3/0673

    Abstract: Disclosed is a memory device which includes a first memory cell that is electrically connected with a first word line and a first bit line, a first bit line sense amplifier circuit that is electrically connected with the first bit line, a first local sense amplifier circuit that is electrically connected with the first bit line sense amplifier circuit through a first local input/output line, a first local driver that is electrically connected with the first local sense amplifier circuit through a first pre-global input/output line, and a sense amplifier and write driver that is electrically connected with the first local driver through a global input/output line, and the first local driver selectively electrical-disconnects the first pre-global input/output line from the global input/output line, based on an operation for the first memory cell.

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