公开(公告)号：US20170278745A1

公开(公告)日：2017-09-28

申请号：US15621618

申请日：2017-06-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong-Su Kim ,  Dong-Woon Park ,  Tae-Hoi Park ,  Yong-Kug Bae ,  Tae-Hwan Oh ,  Chang-Hoon Lee ,  Boo-Hyun Ham

IPC: H01L21/768 ,  H01L27/02 ,  G03F7/20 ,  H01L21/8234

CPC classification number: H01L21/76816 ,  G03F7/70633 ,  G03F7/70683 ,  H01L21/28518 ,  H01L21/31144 ,  H01L21/76811 ,  H01L21/76897 ,  H01L21/823437 ,  H01L21/823475 ,  H01L27/0207

Abstract: In a method of fabricating a semiconductor device, a substrate including a circuit area and an overlay mark area is provided. Conductive gate patterns are formed on the substrate in the circuit area such that the overlay mark area is free of the gate patterns, and conductive contact patterns are formed on the substrate between the gate patterns in the circuit area. A mirror pattern is formed on the substrate in the overlay mark area, where the mirror pattern and the contact patterns comprising a same reflective material. Related semiconductor devices, overlay marks, and fabrication methods are also discussed.

公开(公告)号：US20170221832A1

公开(公告)日：2017-08-03

申请号：US15290921

申请日：2016-10-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YOUNG-SIK PARK ,  Yi-Gwon Kim ,  Yong-Kug Bae ,  Sung-Won Choi ,  Hee-Ho Ku ,  Ga-Hyun Yang

IPC: H01L23/544 ,  H01L21/66 ,  H01L23/552

CPC classification number: H01L23/544 ,  G03F7/70633 ,  H01L22/20 ,  H01L23/552 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/5446

Abstract: A semiconductor device includes a substrate including at least two semiconductor chip regions and a scribe lane region disposed between the semiconductor chip regions. The semiconductor device additionally includes a first optical measurement pattern disposed on the substrate. The semiconductor device further includes a second optical measurement pattern disposed on an upper layer of the first optical measurement pattern, the second optical measurement pattern being spaced apart from the first optical measurement pattern. The semiconductor device additionally includes a three-dimensional (3D) shielding structure surrounding the first optical measurement pattern and including an electrically conductive material.

公开(公告)号：US09929104B2

公开(公告)日：2018-03-27

申请号：US15290921

申请日：2016-10-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young-Sik Park ,  Yi-Gwon Kim ,  Yong-Kug Bae ,  Sung-Won Choi ,  Hee-Ho Ku ,  Ga-Hyun Yang

IPC: H01L29/06 ,  H01L23/544 ,  H01L21/66 ,  H01L23/552 ,  G03F7/20

CPC classification number: H01L23/544 ,  G03F7/70633 ,  H01L22/20 ,  H01L23/552 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/5446

Abstract: A semiconductor device includes a substrate including at least two semiconductor chip regions and a scribe lane region disposed between the semiconductor chip regions. The semiconductor device additionally includes a first optical measurement pattern disposed on the substrate. The semiconductor device further includes a second optical measurement pattern disposed on an upper layer of the first optical measurement pattern, the second optical measurement pattern being spaced apart from the first optical measurement pattern. The semiconductor device additionally includes a three-dimensional (3D) shielding structure surrounding the first optical measurement pattern and including an electrically conductive material.