公开(公告)号：US11528018B2

公开(公告)日：2022-12-13

申请号：US16930658

申请日：2020-07-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongwoo Kim ,  Minsu Kim ,  Yonggeol Kim ,  Hyun Lee ,  Hyunchul Hwang

IPC: H03K3/3562 ,  H03K3/037 ,  H03K19/00

Abstract: A flip-flop includes an input switching circuit configured to output an intermediate signal based on an input signal and at least one of a phase of a clock signal or a phase of an inverted clock signal, the phase of the inverted clock signal being opposite to the phase of the clock signal, and block application of a driving voltage to at least one circuit element of the input switching circuit in response to receiving a reset signal representing a reset operation of the flip-flop, and a latch circuit configured to generate an output signal based on the intermediate signal according to the at least one of the phase of the clock signal or the phase of the inverted clock signal.

公开(公告)号：US12197841B2

公开(公告)日：2025-01-14

申请号：US18167421

申请日：2023-02-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyungbong Kim ,  Minsu Kim ,  Yonggeol Kim

IPC: G06F30/39 ,  G06F30/327 ,  G06F30/392 ,  G06F30/394 ,  G06F30/3947 ,  G06F30/3953 ,  G06F30/398 ,  H01L23/522 ,  G06F117/04

Abstract: An integrated circuit includes a standard cell including a first output pin and a second output pin configured to each output the same output signal, a first routing path connected to the first output pin, and a second routing path connected to the second output pin. The first routing path includes a first cell group including at least one load cell, the second routing path includes a second cell group including at least one load cell, and the first routing path and the second routing path are electrically disconnected from each other outside the standard cell.

公开(公告)号：US12126343B2

公开(公告)日：2024-10-22

申请号：US17983929

申请日：2022-11-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongwoo Kim ,  Minsu Kim ,  Yonggeol Kim ,  Hyun Lee ,  Hyunchul Hwang

IPC: H03K3/037 ,  H03K3/356 ,  H03K3/3562 ,  H03K19/00

CPC classification number: H03K3/0372 ,  H03K3/0375 ,  H03K3/356008 ,  H03K3/3562 ,  H03K19/0002

Abstract: A flip-flop includes an input switching circuit configured to output an intermediate signal based on an input signal and at least one of a phase of a clock signal or a phase of an inverted clock signal, the phase of the inverted clock signal being opposite to the phase of the clock signal, and block application of a driving voltage to at least one circuit element of the input switching circuit in response to receiving a reset signal representing a reset operation of the flip-flop, and a latch circuit configured to generate an output signal based on the intermediate signal according to the at least one of the phase of the clock signal or the phase of the inverted clock signal.

公开(公告)号：US11580288B2

公开(公告)日：2023-02-14

申请号：US16848222

申请日：2020-04-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyungbong Kim ,  Minsu Kim ,  Yonggeol Kim

IPC: G06F30/00 ,  G06F30/398 ,  G06F30/392 ,  G06F30/3947 ,  G06F30/3953 ,  G06F30/327 ,  H01L23/522 ,  G06F30/394 ,  G06F117/04

Abstract: An integrated circuit includes a standard cell including a first output pin and a second output pin configured to each output the same output signal, a first routing path connected to the first output pin, and a second routing path connected to the second output pin. The first routing path includes a first cell group including at least one load cell, the second routing path includes a second cell group including at least one load cell, and the first routing path and the second routing path are electrically disconnected from each other outside the standard cell.