VERTICAL NON-VOLATILE MEMORY DEVICES AND METHODS FOR MANUFACTURING THE SAME

    公开(公告)号:US20240206180A1

    公开(公告)日:2024-06-20

    申请号:US18341066

    申请日:2023-06-26

    CPC classification number: H10B43/35 H10B43/27

    Abstract: A vertical non-volatile memory device may include a mold structure including first and second insulation patterns and a first gate electrode, a semiconductor pattern extending through the mold structure in a first direction, a first charge insulation layer between the first insulation pattern and the semiconductor pattern, a second charge insulation layer spaced apart from the first charge insulation layer and between the second insulation pattern and the semiconductor pattern, a charge storage layer between the first and second charge insulation layers and between the first gate electrode and the semiconductor pattern, and a first blocking insulation layer between the first gate electrode and the charge storage layer, and a first length in the first direction of the first gate electrode is shorter than a second length in the first direction of a first surface of the charge storage layer which is in contact with the first blocking insulation layer.

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