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公开(公告)号：US20220407949A1
公开(公告)日：2022-12-22
申请号：US17679412
申请日：2022-02-24
发明人： Yong-Yun PARK , Kyungho RYU , Kilhoon LEE , Hyunwook LIM , Youngmin CHOI , Kyungae KIM
IPC分类号： H04L69/324
摘要： Disclosed is an operating method of an encoder, which includes receiving a first bit stream including first to N-th bits, determining at least one symbol in the first bit stream, wherein the at least one symbol includes “M” consecutive bits each having the first bit value or the second bit value, and generating a first data packet including a first header and at least one packet symbol. The first header includes a least symbol address of a first symbol of the at least one symbol and an inverted value of a bit value of the first bit, a first packet symbol of the at least one packet symbol includes a bit value of the first symbol, a least symbol address of a second symbol of the at least one symbol, and an inverted value of a bit value of a next bit of the first symbol.
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公开(公告)号：US20170116954A1
公开(公告)日：2017-04-27
申请号：US15271837
申请日：2016-09-21
发明人： Dong-Hoon BAEK , Hyunwook LIM , Kwi Sung YOO , Eun-Young JIN , Kyongho KIM , JaeYoul LEE , Youngmin CHOI
CPC分类号： G09G5/008 , G09G3/2096 , G09G2310/027 , G09G2330/10 , G09G2370/10 , G09G2370/16 , H03L7/0807 , H03L7/0891 , H03L7/095
摘要： A clock and data recovery circuit in accordance with an embodiment of the inventive concept includes a phase locked loop configured to receive a data stream into which an additional bit is inserted at every reference period to generate parallelized data and a clock signal, and a first detector circuit configured to determine whether the parallelized data is locked based on a bit-conversion of the data stream according to an insertion of the additional bit. The bit-conversion is executed with respect to the additional bits according to a predetermined protocol, or is executed with respect to at least one bit from among data of the data stream between a current one of the additional bits and a next one of the additional bits.
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公开(公告)号：US20230421671A1
公开(公告)日：2023-12-28
申请号：US18244107
申请日：2023-09-08
发明人： Yong-Yun PARK , Kyungho RYU , Kilhoon LEE , Hyunwook LIM , Youngmin CHOI , Kyungae KIM
IPC分类号： H04L69/324
CPC分类号： H04L69/324 , H04L47/43
摘要： Disclosed is an operating method of an encoder, which includes receiving a first bit stream including first to N-th bits, determining at least one symbol in the first bit stream, wherein the at least one symbol includes “M” consecutive bits each having the first bit value or the second bit value, and generating a first data packet including a first header and at least one packet symbol. The first header includes a least symbol address of a first symbol of the at least one symbol and an inverted value of a bit value of the first bit, a first packet symbol of the at least one packet symbol includes a bit value of the first symbol, a least symbol address of a second symbol of the at least one symbol, and an inverted value of a bit value of a next bit of the first symbol.
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公开(公告)号：US20190276978A1
公开(公告)日：2019-09-12
申请号：US16285117
申请日：2019-02-25
发明人： Hyejoon SEOK , Sangoh YOO , Minjoon JUNG , Dohaeng KIM , Hyungwoo LEE , Seungeun CHUNG , Youngmin CHOI
摘要： A clothes dryer is disclosed. The clothes dryer includes a rotatably disposed drum, a heat pump system including a compressor configured to compress a refrigerant and a condenser configured to condense the refrigerant, a heater configured to heat air supplied to the interior of the drum, a first temperature sensor configured to detect a temperature of air passing through the interior of the drum, a second temperature sensor configured to detect a temperature of the compressor, and a processor configured to control an operation of the compressor on the basis of the temperature of the air passing through the interior of the drum detected by the first temperature sensor and control an operation of the heater on the basis of the temperature of the compressor detected by the second temperature sensor.
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