公开(公告)号：US20220029094A1

公开(公告)日：2022-01-27

申请号：US17496363

申请日：2021-10-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun Heub SONG

IPC: H01L45/00 ,  H01L27/24 ,  G11C13/00

Abstract: According to an embodiment, a phase-change memory device comprises: an upper electrode and a lower electrode; a phase-change layer in which a crystal state thereof is changed by heat supplied by the upper electrode and the lower electrode; and a selector which selectively switches the heat supplied by the upper electrode and the lower electrode to the phase-change layer, wherein the selector is formed of a compound which includes a transition metal in the phase-change material so as to have a high resistance when the crystalline state of the selector is crystalline and so as to have a low resistance when the crystalline state of the selector is non-crystalline.

公开(公告)号：US20210104632A1

公开(公告)日：2021-04-08

申请号：US17124692

申请日：2020-12-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae Kyeong JEONG ,  Yun Heub SONG ,  Chang Hwan CHOI ,  Hyeon Joo SEUL

IPC: H01L29/786

Abstract: The semiconductor device includes a substrate, a stack structure including gate patterns and interlayer insulating films that are alternately stacked on the substrate, an insulating pillar extending in a thickness direction of the substrate within the stack structure, a polycrystalline metal oxide film extending along a sidewall of the insulating pillar between the insulating pillar and the stack structure, a liner film having a transition metal between the insulating pillar and the polycrystalline metal oxide film, and a tunnel insulating film, a charge storage film, and a blocking insulating film which are disposed in order between the polycrystalline metal oxide film and the gate patterns.

公开(公告)号：US20210376233A1

公开(公告)日：2021-12-02

申请号：US17051268

申请日：2019-05-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun Heub SONG ,  Jae Kyeong JEONG

IPC: H01L45/00 ,  H01L27/24

Abstract: Provided are a selection element which does not need an intermediate electrode and thus has improved integration, a phase-change memory device having the selection element, and a phase-change memory implemented so that the phase-change memory device has a highly integrated three-dimensional architecture.

公开(公告)号：US20250169073A1

公开(公告)日：2025-05-22

申请号：US19029181

申请日：2025-01-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun Heub SONG

IPC: H10B43/27 ,  H10B43/35 ,  H10B43/40

Abstract: A three-dimensional flash memory is provided, and technique to suppress interference caused by an inter-cell insulation layer in a vertical cell and to form a stable vertical channel layer, a technique to reduce a length of wire than a conventional three-dimensional flash memory for overcoming problems of deterioration of chip characteristics such as operation speed and power consumption and difficulty of wiring technique in the manufacturing process, and a technique to improve horizontal density of channel layers and ONO layers are proposed.

公开(公告)号：US20230143256A1

公开(公告)日：2023-05-11

申请号：US18154210

申请日：2023-01-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun Heub SONG

IPC: H01L29/76

CPC classification number: H10B43/27 ,  H10B43/40 ,  H10B43/35

Abstract: A three-dimensional flash memory is provided, and technique to suppress interference caused by an inter-cell insulation layer in a vertical cell and to form a stable vertical channel layer, a technique to reduce a length of wire than a conventional three-dimensional flash memory for overcoming problems of deterioration of chip characteristics such as operation speed and power consumption and difficulty of wiring technique in the manufacturing process, and a technique to improve horizontal density of channel layers and ONO layers are proposed.

公开(公告)号：US20190393353A1

公开(公告)日：2019-12-26

申请号：US16450218

申请日：2019-06-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae Kyeong JEONG ,  Yun Heub SONG ,  Chang Hwan CHOI ,  Hyeon Joo SEUL

IPC: H01L29/786

Abstract: The semiconductor device includes a substrate, a stack structure including gate patterns and interlayer insulating films that are alternately stacked on the substrate, an insulating pillar extending in a thickness direction of the substrate within the stack structure, a polycrystalline metal oxide film extending along a sidewall of the insulating pillar between the insulating pillar and the stack structure, a liner film having a transition metal between the insulating pillar and the polycrystalline metal oxide film, and a tunnel insulating film, a charge storage film, and a blocking insulating film which are disposed in order between the polycrystalline metal oxide film and the gate patterns.

公开(公告)号：US20220115398A1

公开(公告)日：2022-04-14

申请号：US17424255

申请日：2020-01-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yun Heub SONG

IPC: H01L27/11582 ,  H01L27/11521 ,  H01L27/11556 ,  H01L27/11568 ,  H01L29/06

Abstract: A 3-dimensional (3D) flash memory having a structure that mitigates an interference phenomenon between neighboring cells in an oxide-nitride-oxide (ONO) layer, which is a charge storage layer, and a method of manufacturing the same are provided. The 3D flash memory includes at least one channel layer formed to extend in a first direction; a plurality of electrode layers formed to extend in a second direction orthogonal to a first direction so as to be vertically stacked with respect to the at least one channel layer; a plurality of air gaps interposed between the plurality of electrode layers to separate the plurality of electrode layers from each other; and at least one oxide-nitride-oxide (ONO) layer comprising a first oxide layer, a nitride layer, and a second oxide layer and formed to extend in the first direction to connect the at least one channel layer and the plurality of electrode layers, wherein the 3D flash memory includes a structure that mitigates an interference phenomenon between cells respectively contacting the plurality of electrode layers in the at least one ONO layer.