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公开(公告)号:US20180210661A1
公开(公告)日:2018-07-26
申请号:US15933365
申请日:2018-03-22
Applicant: SanDisk Technologies LLC
Inventor: Jea Hyun , James Peterson , Long Pham , John Strasser , Hairong Sun , Kapil Verma
IPC: G06F3/06
CPC classification number: G06F3/0611 , G06F3/0659 , G06F3/067 , G06F3/0688
Abstract: Apparatuses, systems, methods, and computer program products are disclosed for interrupting storage operations. An integrated circuit chip comprising non-volatile memory, the integrated circuit chip configured to, determine a number of portions into which a storage operation is to be split; pause execution of the storage operation from within the integrated circuit chip according to the determined number of portions; execute one or more other storage operations on the integrated circuit chip while the storage operation is paused, each of the one or more other storage operations having a shorter duration than the storage operation; and continue the paused storage operation in response to a trigger.
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公开(公告)号:US10089021B2
公开(公告)日:2018-10-02
申请号:US15933365
申请日:2018-03-22
Applicant: SanDisk Technologies LLC
Inventor: Jea Hyun , James Peterson , Long Pham , John Strasser , Hairong Sun , Kapil Verma
Abstract: Apparatuses, systems, methods, and computer program products are disclosed for interrupting storage operations. An integrated circuit chip comprising non-volatile memory, the integrated circuit chip configured to, determine a number of portions into which a storage operation is to be split; pause execution of the storage operation from within the integrated circuit chip according to the determined number of portions; execute one or more other storage operations on the integrated circuit chip while the storage operation is paused, each of the one or more other storage operations having a shorter duration than the storage operation; and continue the paused storage operation in response to a trigger.
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公开(公告)号:US20180061505A1
公开(公告)日:2018-03-01
申请号:US15246309
申请日:2016-08-24
Applicant: SanDisk Technologies LLC
Inventor: Ashish Ghai , Lakshmi Kalpana Vakati , Ekamdeep Singh , Chang Siau , Gopinath Balakrishnan , Kapil Verma
CPC classification number: G11C16/3495 , G11C16/0483 , G11C16/08 , G11C16/16 , H01L27/11556 , H01L27/11582 , H01L27/2481
Abstract: Technology is described herein for detecting a leakage current between a block select line and a conductive region that exists in multiple blocks of memory cells in a plane. The conductive region may be shared by at least one memory cell in multiple blocks. One example of the conductive region is a common source line that includes one or more local source lines and one or more global source lines. If the leakage current were to become high enough, the electrical short between the conductive region and the block select line could cause a plane level failure. If the leakage current is less than an amount that would cause a plane failure, but that indicates that the non-volatile memory device is susceptible to a plane failure, data may be moved out of the plane before the plane failure occurs. Thus, data loss may be prevented.
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公开(公告)号:US09905307B1
公开(公告)日:2018-02-27
申请号:US15246309
申请日:2016-08-24
Applicant: SanDisk Technologies LLC
Inventor: Ashish Ghai , Lakshmi Kalpana Vakati , Ekamdeep Singh , Chang Siau , Gopinath Balakrishnan , Kapil Verma
IPC: G11C16/34 , G11C16/04 , G11C16/16 , G11C16/08 , H01L27/11556 , H01L27/11582 , H01L27/24
CPC classification number: G11C16/3495 , G11C16/0483 , G11C16/08 , G11C16/16 , H01L27/11556 , H01L27/11582 , H01L27/2481
Abstract: Technology is described herein for detecting a leakage current between a block select line and a conductive region that exists in multiple blocks of memory cells in a plane. The conductive region may be shared by at least one memory cell in multiple blocks. One example of the conductive region is a common source line that includes one or more local source lines and one or more global source lines. If the leakage current were to become high enough, the electrical short between the conductive region and the block select line could cause a plane level failure. If the leakage current is less than an amount that would cause a plane failure, but that indicates that the non-volatile memory device is susceptible to a plane failure, data may be moved out of the plane before the plane failure occurs. Thus, data loss may be prevented.
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