公开(公告)号：US20120139013A1

公开(公告)日：2012-06-07

申请号：US12959736

申请日：2010-12-03

Applicant: Sandeep Bahl ,  Constantin Bulucea

Inventor： Sandeep Bahl ,  Constantin Bulucea

IPC: H01L29/808 ,  H01L21/337

CPC classification number: H01L29/7722 ,  H01L27/085

Abstract: A static induction transistor comprising: a region of semiconductor material having a first conductivity type; at least two spaced-apart gate regions formed in the region of semiconductor material, the gate regions having a second conductivity type that is opposite to the first conductivity type; at least one source region having the first conductivity type formed in the region of semiconductor material between the spaced-apart gate regions; a drain region having the first conductivity type formed in the region of semiconductor and spaced-apart from the source region to define a channel region therebetween; and a dielectric carrier separation layer formed at the periphery of the gate regions.

Abstract translation: 一种静电感应晶体管，包括：具有第一导电类型的半导体材料区域; 形成在所述半导体材料区域中的至少两个间隔开的栅极区域，所述栅极区域具有与所述第一导电类型相反的第二导电类型; 在所述间隔开的栅极区域之间的半导体材料的区域中形成具有第一导电类型的至少一个源极区域; 具有第一导电类型的漏极区，形成在半导体区域中并与源极区间隔开以在其间限定沟道区; 以及形成在栅极区域的周边的介电载体分离层。

公开(公告)号：US08513703B2

公开(公告)日：2013-08-20

申请号：US12908514

申请日：2010-10-20

Applicant: Sandeep Bahl ,  Constantin Bulucea

Inventor： Sandeep Bahl ,  Constantin Bulucea

IPC: H01L21/338 ,  H01L29/778

CPC classification number: H01L29/0661 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787

Abstract: The Si substrate of a group III-N HEMT is formed in layers that define a p-n junction which electrically isolates an upper region of the Si substrate from a lower region of the Si substrate. As a result, the upper region of the Si substrate can electrically float, thereby obtaining a full buffer breakdown voltage, while the lower region of the Si substrate can be attached to a package by way of a conductive epoxy, thereby significantly improving the thermal conductivity of the group III-N HEMT and minimizing undesirable floating-voltage regions.

Abstract translation: 组III-N HEMT的Si衬底形成为限定将Si衬底的上部区域与Si衬底的下部区域电隔离的p-n结的层。 结果，Si衬底的上部区域可以电浮动，从而获得全缓冲击穿电压，而Si衬底的下部区域可以通过导电环氧树脂附着到封装上，从而显着提高导热性 的III-N HEMT组，并且使不期望的浮动电压区域最小化。

公开(公告)号：US20120098036A1

公开(公告)日：2012-04-26

申请号：US12908514

申请日：2010-10-20

Applicant: Sandeep Bahl ,  Constantin Bulucea

Inventor： Sandeep Bahl ,  Constantin Bulucea

IPC: H01L29/778 ,  H01L21/335

CPC classification number: H01L29/0661 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787

Abstract: The Si substrate of a group III-N HEMT is formed in layers that define a p-n junction which electrically isolates an upper region of the Si substrate from a lower region of the Si substrate. As a result, the upper region of the Si substrate can electrically float, thereby obtaining a full buffer breakdown voltage, while the lower region of the Si substrate can be attached to a package by way of a conductive epoxy, thereby significantly improving the thermal conductivity of the group III-N HEMT and minimizing undesirable floating-voltage regions.

Abstract translation: 组III-N HEMT的Si衬底形成为限定将Si衬底的上部区域与Si衬底的下部区域电隔离的p-n结的层。 结果，Si衬底的上部区域可以电浮动，从而获得全缓冲击穿电压，而Si衬底的下部区域可以通过导电环氧树脂附着到封装上，从而显着提高导热性 的III-N HEMT组，并且使不期望的浮动电压区域最小化。

公开(公告)号：US20120098035A1

公开(公告)日：2012-04-26

申请号：US12908458

申请日：2010-10-20

Applicant: Sandeep Bahl ,  Constantin Bulucea

Inventor： Sandeep Bahl ,  Constantin Bulucea

IPC: H01L29/778 ,  H01L21/335

CPC classification number: H01L29/7787 ,  H01L29/2003 ,  H01L29/66462

Abstract: The buffer breakdown of a group III-N HEMT on a p-type Si substrate is significantly increased by forming an n-well in the p-type Si substrate to lie directly below the metal drain region of the group III-N HEMT. The n-well forms a p-n junction which becomes reverse biased during breakdown, thereby increasing the buffer breakdown by the reverse-biased breakdown voltage of the p-n junction and allowing the substrate to be grounded. The buffer layer of a group III-N HEMT can also be implanted with n-type and p-type dopants which are aligned with the p-n junction to minimize any leakage currents at the junction between the substrate and the buffer layer.

Abstract translation: 通过在p型Si衬底中形成n阱以直接位于III-NHEMT族金属漏极区的下方，在p型Si衬底上的III-N HEMT组的缓冲击穿显着增加。 n阱形成在击穿期间变得反向偏置的p-n结，从而通过p-n结的反向偏置击穿电压增加缓冲器击穿，并允许衬底接地。 III-N型HEMT的缓冲层也可以注入与p-n结对准的n型和p型掺杂剂，以最小化衬底和缓冲层之间的接合处的任何漏电流。

公开(公告)号：US08502273B2

公开(公告)日：2013-08-06

申请号：US12908458

申请日：2010-10-20

Applicant: Sandeep Bahl ,  Constantin Bulucea

Inventor： Sandeep Bahl ,  Constantin Bulucea

IPC: H01L29/778 ,  H01L21/338

CPC classification number: H01L29/7787 ,  H01L29/2003 ,  H01L29/66462

Abstract: The buffer breakdown of a group III-N HEMT on a p-type Si substrate is significantly increased by forming an n-well in the p-type Si substrate to lie directly below the metal drain region of the group III-N HEMT. The n-well forms a p-n junction which becomes reverse biased during breakdown, thereby increasing the buffer breakdown by the reverse-biased breakdown voltage of the p-n junction and allowing the substrate to be grounded. The buffer layer of a group III-N HEMT can also be implanted with n-type and p-type dopants which are aligned with the p-n junction to minimize any leakage currents at the junction between the substrate and the buffer layer.

Abstract translation: 通过在p型Si衬底中形成n阱以直接位于III-NHEMT族金属漏极区的下方，在p型Si衬底上的III-N HEMT组的缓冲击穿显着增加。 n阱形成在击穿期间变得反向偏置的p-n结，从而通过p-n结的反向偏置击穿电压增加缓冲器击穿，并允许衬底接地。 III-N型HEMT的缓冲层也可以注入与p-n结对准的n型和p型掺杂剂，以最小化衬底和缓冲层之间的接合处的任何漏电流。

公开(公告)号：US20130126889A1

公开(公告)日：2013-05-23

申请号：US13302997

申请日：2011-11-22

Applicant: Sandeep Bahl

Inventor： Sandeep Bahl

IPC: H01L29/778 ,  H01L21/335

CPC classification number: H01L29/66462 ,  H01L29/2003 ,  H01L29/7786

Abstract: An enhancement-mode group III-N high electron mobility transistor (HEMT) with a reverse polarization cap is formed in a method that utilizes a reverse polarization cap structure, such as an InGaN cap structure, to deplete the two-dimensional electron gas (2DEG) and form a normally off device, and a spacer layer that lies below the reverse polarization cap structure and above the barrier layer of the HEMT which allows the reverse polarization cap layer to be etched without etching into the barrier layer.

Abstract translation: 以利用诸如InGaN帽结构的反向偏振帽结构来消除二维电子气（2DEG）的方法形成具有反向偏振盖的增强型组III-N高电子迁移率晶体管（HEMT） ）并形成常闭装置，以及位于反偏振盖结构下方和HEMT阻挡层上方的间隔层，其允许在不刻蚀阻挡层的情况下蚀刻反向极化覆盖层。

公开(公告)号：US20080079045A1

公开(公告)日：2008-04-03

申请号：US11940569

申请日：2007-11-15

Applicant: Sandeep Bahl ,  Fredrick LaMaster ,  David Bigelow

Inventor： Sandeep Bahl ,  Fredrick LaMaster ,  David Bigelow

IPC: H01L27/146 ,  H01L31/18

CPC classification number: H01L27/14687 ,  H01L27/1463 ,  H01L27/14649

Abstract: CMOS image sensor having high sensitivity and low crosstalk, particularly at far-red to infrared wavelengths, and a method for fabricating a CMOS image sensor. A CMOS image sensor has a substrate, an epitaxial layer above the substrate, and a plurality of pixels extending into the epitaxial layer for receiving light. The image sensor also includes at least one of a horizontal barrier layer between the substrate and the epitaxial layer for preventing carriers generated in the substrate from moving to the epitaxial layer, and a plurality of lateral barrier layers between adjacent ones of the plurality of pixels for preventing lateral diffusion of electrons in the epitaxial layer.

Abstract translation: 具有高灵敏度和低串扰的CMOS图像传感器，特别是在远红外到红外波长的CMOS图像传感器以及CMOS图像传感器的制造方法。 CMOS图像传感器具有衬底，衬底上方的外延层以及延伸到用于接收光的外延层中的多个像素。 图像传感器还包括在衬底和外延层之间的水平阻挡层中的至少一个，用于防止在衬底中产生的载流子移动到外延层，以及在多个像素中的相邻像素之间的多个横向势垒层， 防止电子在外延层中的横向扩散。

公开(公告)号：US06583044B2

公开(公告)日：2003-06-24

申请号：US09892920

申请日：2001-06-26

Applicant: Sandeep Bahl ,  Karen L. Seaward

Inventor： Sandeep Bahl ,  Karen L. Seaward

IPC: H01L214763

CPC classification number: B81C1/00071 ,  B81B2201/058

Abstract: A buried channel and a method of fabricating a buried channel in a substrate including depositing a layer of masking material onto a surface of a substrate, etching a groove in the masking layer, etching a channel into the substrate through the groove, and depositing a cover layer over the masking layer and groove such that the covering layer at least substantially closes over the groove.

公开(公告)号：US08723226B2

公开(公告)日：2014-05-13

申请号：US13302997

申请日：2011-11-22

Applicant: Sandeep Bahl

Inventor： Sandeep Bahl

IPC: H01L29/66

CPC classification number: H01L29/66462 ,  H01L29/2003 ,  H01L29/7786

Abstract: An enhancement-mode group III-N high electron mobility transistor (HEMT) with a reverse polarization cap is formed in a method that utilizes a reverse polarization cap structure, such as an InGaN cap structure, to deplete the two-dimensional electron gas (2DEG) and form a normally off device, and a spacer layer that lies below the reverse polarization cap structure and above the barrier layer of the HEMT which allows the reverse polarization cap layer to be etched without etching into the barrier layer.

Abstract translation: 以利用诸如InGaN帽结构的反向偏振盖结构的方法形成具有反向偏振盖的增强型组III-N高电子迁移率晶体管（HEMT），以消耗二维电子气（2DEG ）并形成常闭装置，以及位于反偏振盖结构下方和HEMT阻挡层上方的间隔层，其允许在不刻蚀阻挡层的情况下蚀刻反向极化覆盖层。

公开(公告)号：US20070029589A1

公开(公告)日：2007-02-08

申请号：US11197004

申请日：2005-08-04

Applicant: Sandeep Bahl ,  Fredrick LaMaster ,  David Bigelow

Inventor： Sandeep Bahl ,  Fredrick LaMaster ,  David Bigelow

IPC: H01L31/113

CPC classification number: H01L27/14687 ,  H01L27/1463 ,  H01L27/14649

Abstract: CMOS image sensor having high sensitivity and low crosstalk, particularly at far-red to infrared wavelengths, and a method for fabricating a CMOS image sensor. A CMOS image sensor has a substrate, an epitaxial layer above the substrate, and a plurality of pixels extending into the epitaxial layer for receiving light. The image sensor also includes at least one of a horizontal barrier layer between the substrate and the epitaxial layer for preventing carriers generated in the substrate from moving to the epitaxial layer, and a plurality of lateral barrier layers between adjacent ones of the plurality of pixels for preventing lateral diffusion of electrons in the epitaxial layer.