公开(公告)号：US06479346B1

公开(公告)日：2002-11-12

申请号：US09544214

申请日：2000-04-07

申请人： Sang-Bai Yi ,  Jae-Min Yu ,  Sung-Chul Lee

发明人： Sang-Bai Yi ,  Jae-Min Yu ,  Sung-Chul Lee

IPC分类号： H01L21336

CPC分类号： H01L27/11526 ,  H01L27/105 ,  H01L27/11539 ,  Y10S257/903

摘要： In a semiconductor memory device including memory cells and a peripheral circuit unit, a memory cell has a first gate structure formed on a semiconductor substrate; a first impurity region of a first conductive type formed in the substrate on a first side of the gate structure; and a second impurity region formed in the substrate on a second side of the gate structure, the second impurity region including: a third impurity region of the first conductive type, a fourth impurity region of the first conductive type between the third impurity region and the second side of the gate structure, and a halo ion region of a second conductive type formed adjacent to the fourth impurity region.

摘要翻译： 在包括存储单元和外围电路单元的半导体存储器件中，存储单元具有形成在半导体衬底上的第一栅极结构; 第一导电类型的第一杂质区域形成在栅极结构的第一侧上的衬底中; 以及形成在所述栅极结构的第二侧上的所述衬底中的第二杂质区域，所述第二杂质区域包括：第一导电类型的第三杂质区域，第三杂质区域和第三杂质区域之间的第一导电类型的第四杂质区域， 栅极结构的第二侧和与第四杂质区相邻形成的第二导电类型的晕圈离子区。

公开(公告)号：US06885070B2

公开(公告)日：2005-04-26

申请号：US10259871

申请日：2002-09-30

申请人： Sang-Bai Yi ,  Jae-Min Yu ,  Sung-Chul Lee

发明人： Sang-Bai Yi ,  Jae-Min Yu ,  Sung-Chul Lee

IPC分类号： H01L21/8247 ,  H01L27/105 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L21/336 ,  H01L29/76 ,  H01L29/94

CPC分类号： H01L27/11526 ,  H01L27/105 ,  H01L27/11539 ,  Y10S257/903

摘要： In a semiconductor memory device including memory cells and a peripheral circuit unit, a memory cell has a first gate structure formed on a semiconductor substrate; a first impurity region of a first conductive type formed in the substrate on a first side of the gate structure; and a second impurity region formed in the substrate on a second side of the gate structure, the second impurity region including: a third impurity region of the first conductive type, a fourth impurity region of the first conductive type between the third impurity region and the second side of the gate structure, and a halo ion region of a second conductive type formed adjacent to the fourth impurity region.

摘要翻译： 在包括存储单元和外围电路单元的半导体存储器件中，存储单元具有形成在半导体衬底上的第一栅极结构; 第一导电类型的第一杂质区域形成在栅极结构的第一侧上的衬底中; 以及形成在所述栅极结构的第二侧上的所述衬底中的第二杂质区域，所述第二杂质区域包括：第一导电类型的第三杂质区域，第三杂质区域和第三杂质区域之间的第一导电类型的第四杂质区域， 栅极结构的第二侧和与第四杂质区相邻形成的第二导电类型的晕圈离子区。