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公开(公告)号：US20080233769A1
公开(公告)日：2008-09-25
申请号：US11688757
申请日：2007-03-20
IPC分类号： H05K1/00
CPC分类号： G01R31/2889 , H01R12/7023 , H01R12/7082 , H01R31/005 , H05K1/147
摘要： There is disclosed apparatus for routing signals between at least one PCB within a test head and a socket card assembly. In an embodiment, the apparatus may include at least one flexible circuit electrically connecting first and second sides of the PCB and the socket card assembly with one another, and the flexible circuit having a defined shape configured to interface with the socket card assembly and the PCB along substantially perpendicular planes. Methods of routing signals between at least one PCB within a test head and a socket card assembly are disclosed. In one embodiment, a method may include electrically connecting first and second sides of the PCB and the socket card assembly with one another with at least one flexible circuit having a defined shape configured to interface with the socket card assembly and the PCB along substantially perpendicular planes. Other embodiments are also disclosed.
摘要翻译： 公开了用于在测试头内的至少一个PCB和插座卡组件之间路由信号的装置。 在一个实施例中，该装置可以包括将PCB和插座卡组件的第一和第二侧彼此电连接的至少一个柔性电路，并且柔性电路具有被配置为与插座卡组件和PCB 沿着基本垂直的平面。 公开了在测试头内的至少一个PCB和插座卡组件之间路由信号的方法。 在一个实施例中，一种方法可以包括将PCB和插座卡组件的第一和第二侧彼此电连接，其中至少一个柔性电路具有限定的形状，其被配置成与插座卡组件和PCB基本垂直的平面 。 还公开了其他实施例。
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2.发明授权System, method and apparatus using at least one flex circuit to connect a printed circuit board and a socket card assembly that are oriented at a right angle to one another 有权使用至少一个柔性电路来连接彼此成直角定向的印刷电路板和插座卡组件的系统，方法和装置公开(公告)号：US07717715B2
公开(公告)日：2010-05-18
申请号：US11688757
申请日：2007-03-20
IPC分类号： H01R12/00
CPC分类号： G01R31/2889 , H01R12/7023 , H01R12/7082 , H01R31/005 , H05K1/147
摘要： There is disclosed apparatus for routing signals between at least one PCB within a test head and a socket card assembly. In an embodiment, the apparatus may include at least one flexible circuit electrically connecting first and second sides of the PCB and the socket card assembly with one another, and the flexible circuit having a defined shape configured to interface with the socket card assembly and the PCB along substantially perpendicular planes. Methods of routing signals between at least one PCB within a test head and a socket card assembly are disclosed. In one embodiment, a method may include electrically connecting first and second sides of the PCB and the socket card assembly with one another with at least one flexible circuit having a defined shape configured to interface with the socket card assembly and the PCB along substantially perpendicular planes. Other embodiments are also disclosed.
摘要翻译： 公开了用于在测试头内的至少一个PCB和插座卡组件之间路由信号的装置。 在一个实施例中，该装置可以包括将PCB和插座卡组件的第一和第二侧彼此电连接的至少一个柔性电路，并且柔性电路具有被配置为与插座卡组件和PCB 沿着基本垂直的平面。 公开了在测试头内的至少一个PCB和插座卡组件之间路由信号的方法。 在一个实施例中，一种方法可以包括将PCB和插座卡组件的第一和第二侧彼此电连接，其中至少一个柔性电路具有限定的形状，其被配置成与插座卡组件和PCB基本垂直的平面 。 还公开了其他实施例。
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公开(公告)号：US07106081B2
公开(公告)日：2006-09-12
申请号：US10886848
申请日：2004-07-08
申请人： Romi Mayder , Todd Sholl , Nasser Ali Jafari , Andrew Tse , Randy L. Bailey
发明人： Romi Mayder , Todd Sholl , Nasser Ali Jafari , Andrew Tse , Randy L. Bailey
IPC分类号： G01R31/02
CPC分类号： G01R31/3191 , G01R35/005
摘要： A parallel calibration system for an electronic circuit tester comprises test and measurement electronics, a test fixture coupled to the test and measurement electronics, the test fixture comprising clock reference circuitry and clock distribution circuitry, a device under test interface, and a plurality of calibration boards coupled to the device under test interface, wherein the plurality of calibration boards and the clock distribution circuitry simultaneously test the signal paths of a plurality of test channels.
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公开(公告)号：US20060006896A1
公开(公告)日：2006-01-12
申请号：US10886848
申请日：2004-07-08
申请人： Romi Mayder , Todd Sholl , Nasser Jafari , Andrew Tse , Randy Bailey
发明人： Romi Mayder , Todd Sholl , Nasser Jafari , Andrew Tse , Randy Bailey
IPC分类号： G01R31/02
CPC分类号： G01R31/3191 , G01R35/005
摘要： A parallel calibration system for an electronic circuit tester comprises test and measurement electronics, a test fixture coupled to the test and measurement electronics, the test fixture comprising clock reference circuitry and clock distribution circuitry, a device under test interface, and a plurality of calibration boards coupled to the device under test interface, wherein the plurality of calibration boards and the clock distribution circuitry simultaneously test the signal paths of a plurality of test channels.
摘要翻译： 用于电子电路测试器的并行校准系统包括测试和测量电子器件，耦合到测试和测量电子器件的测试夹具，测试夹具包括时钟参考电路和时钟分配电路，被测器件接口以及多个校准板 耦合到被测设备的接口，其中所述多个校准板和所述时钟分配电路同时测试多个测试通道的信号路径。
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