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    APPARATUS, SYSTEM AND METHOD FOR A COMMON UNIFIED DEBUG ARCHITECTURE FOR INTEGRATED CIRCUITS AND SoCs
    1.
    发明申请
    APPARATUS, SYSTEM AND METHOD FOR A COMMON UNIFIED DEBUG ARCHITECTURE FOR INTEGRATED CIRCUITS AND SoCs 有权
    用于集成电路和SoC的通用统一调试架构的装置，系统和方法

    公开(公告)号：US20130339790A1

    公开(公告)日：2013-12-19

    申请号：US13834134

    申请日：2013-03-15

    申请人： Sankaran M. Menon ,  Rajendra S. Yavatkar ,  Eyal Dolev ,  Sridhar Valluru ,  Ramana Rachakonda

    发明人： Sankaran M. Menon ,  Rajendra S. Yavatkar ,  Eyal Dolev ,  Sridhar Valluru ,  Ramana Rachakonda

    IPC分类号： G06F11/27

    CPC分类号： G06F11/27 ,  G06F11/2733 ,  G06F11/36 ,  G06F11/3656

    摘要： A system and method for a common unified debug architecture for integrated circuits and System on Chips (SoCs) are provided. A system consistent with the present disclosure may comprise of an integrated circuit or SoC which includes a display port, plurality of logic blocks, and debug logic. The debug logic may receive debug data from one or more of the plurality of logic blocks in response to the integrated circuit or SoC operating in a debug mode. In addition, control logic coupled to the debug logic. The control logic provides display data to the display port in response to the integrated circuit operating in an operational mode. The control logic further directs high-speed debug data to the display port in response to the integrated circuit or SoC operating in the debug mode. The high-speed debug data is to be based on the debug data.

    摘要翻译： 提供了一种用于集成电路和片上系统（SoC）的通用统一调试架构的系统和方法。 与本公开一致的系统可以包括集成电路或SoC，其包括显示端口，多个逻辑块和调试逻辑。 响应于以调试模式操作的集成电路或SoC，调试逻辑可以从多个逻辑块中的一个或多个接收调试数据。 另外，控制逻辑耦合到调试逻辑。 响应于在操作模式下操作的集成电路，控制逻辑向显示端口提供显示数据。 响应于在调试模式下操作的集成电路或SoC，控制逻辑还将高速调试数据引导到显示端口。 高速调试数据将基于调试数据。

    Distributed exterior gateway protocol
    3.
    发明授权
    Distributed exterior gateway protocol 有权
    分布式外部网关协议

    公开(公告)号：US08085765B2

    公开(公告)日：2011-12-27

    申请号：US10713586

    申请日：2003-11-13

    申请人： Sanjay Bakshi ,  Rajendra S. Yavatkar

    发明人： Sanjay Bakshi ,  Rajendra S. Yavatkar

    IPC分类号： H04L12/28

    CPC分类号： H04L45/60 ,  H04L45/04

    摘要： A border gateway has a control card and at least one line card. The control card has a control processor to execute a control portion of an exterior gateway protocol and a routing table of exterior gateway routes and devices. The line card has a line processor to execute an offload portion of an exterior gateway protocol and a communications port to allow termination of at least one communication link. A backplane allows the control card and the line card to communicate.

    摘要翻译： 边界网关具有控制卡和至少一个线路卡。 控制卡具有控制处理器，用于执行外部网关协议的控制部分和外部网关路由和设备的路由表。 线卡具有行处理器以执行外部网关协议的卸载部分和通信端口以允许终止至少一个通信链路。 背板允许控制卡和线卡进行通信。

    Network controller circuitry to issue at least one portion of packet payload to device in manner that by-passes communication protocol stack involvement
    7.
    发明授权
    Network controller circuitry to issue at least one portion of packet payload to device in manner that by-passes communication protocol stack involvement 有权
    网络控制器电路以通过通信协议栈参与的方式发布分组有效载荷的至少一部分

    公开(公告)号：US08553693B2

    公开(公告)日：2013-10-08

    申请号：US12721275

    申请日：2010-03-10

    申请人： Ren Wang ,  Tsung-Yuan C. Tai ,  Christian Maciocco ,  Rajendra S. Yavatkar ,  Lakshman Krishnamurthy ,  Michael J. Espig

    发明人： Ren Wang ,  Tsung-Yuan C. Tai ,  Christian Maciocco ,  Rajendra S. Yavatkar ,  Lakshman Krishnamurthy ,  Michael J. Espig

    IPC分类号： H04L12/56

    CPC分类号： H04L69/22 ,  H04L69/161 ,  H04L69/32

    摘要： An embodiment may include network controller to be comprised in a first node. The node may be communicatively coupled to a network and may include a host processor to execute an operating system environment. The operating system environment may include, at least in part, a communication protocol stack and an application. The circuitry may receive, at least in part, a packet from the network. The packet may include, at least in part, a header and payload. At least one portion of the payload may be associated with the application. The circuitry may issue at least one portion of the header to the stack. The circuitry may issue the at least one portion of the payload to a destination device in a manner that by-passes involvement of the stack. The destination device may be specified, at least in part, by the application. Many alternatives, variations, and modifications are possible.

    摘要翻译： 实施例可以包括要包括在第一节点中的网络控制器。 节点可以通信地耦合到网络并且可以包括主机处理器来执行操作系统环境。 至少部分地，操作系统环境可以包括通信协议栈和应用。 该电路至少部分地可以从网络接收分组。 该分组可以至少部分地包括报头和有效载荷。 有效载荷的至少一部分可以与应用相关联。 该电路可以向该堆栈发出头部的至少一部分。 电路可以以旁路堆栈的方式将有效载荷的至少一部分发送到目的地设备。 目的地设备可以至少部分地由应用来指定。 许多替代方案，变化和修改是可能的。

    NETWORK CONTROLLER CIRCUITRY TO ISSUE AT LEAST ONE PORTION OF PACKET PAYLOAD TO DEVICE IN MANNER THAT BY-PASSES COMMUNICATION PROTOCOL STACK INVOLVEMENT
    8.
    发明申请
    NETWORK CONTROLLER CIRCUITRY TO ISSUE AT LEAST ONE PORTION OF PACKET PAYLOAD TO DEVICE IN MANNER THAT BY-PASSES COMMUNICATION PROTOCOL STACK INVOLVEMENT 有权
    网络控制器电路发送至少一个PACKET PAYLOAD的一部分设备，通过旁路通信协议栈参与

    公开(公告)号：US20110222537A1

    公开(公告)日：2011-09-15

    申请号：US12721275

    申请日：2010-03-10

    申请人： Ren Wang ,  Tsung-Yuan C. Tai ,  Christian Maciocco ,  Rajendra S. Yavatkar ,  Lakshman Krishnamurthy ,  Michael J. Espig

    发明人： Ren Wang ,  Tsung-Yuan C. Tai ,  Christian Maciocco ,  Rajendra S. Yavatkar ,  Lakshman Krishnamurthy ,  Michael J. Espig

    IPC分类号： H04L12/56

    CPC分类号： H04L69/22 ,  H04L69/161 ,  H04L69/32

    摘要： An embodiment may include network controller to be comprised in a first node. The node may be communicatively coupled to a network and may include a host processor to execute an operating system environment. The operating system environment may include, at least in part, a communication protocol stack and an application. The circuitry may receive, at least in part, a packet from the network. The packet may include, at least in part, a header and payload. At least one portion of the payload may be associated with the application. The circuitry may issue at least one portion of the header to the stack. The circuitry may issue the at least one portion of the payload to a destination device in a manner that by-passes involvement of the stack. The destination device may be specified, at least in part, by the application. Many alternatives, variations, and modifications are possible.

    摘要翻译： 实施例可以包括要包括在第一节点中的网络控制器。 节点可以通信地耦合到网络并且可以包括主机处理器来执行操作系统环境。 至少部分地，操作系统环境可以包括通信协议栈和应用。 该电路至少部分地可以从网络接收分组。 该分组可以至少部分地包括报头和有效载荷。 有效载荷的至少一部分可以与应用相关联。 电路可以向该堆栈发出头部的至少一部分。 电路可以以旁路堆栈的方式将有效载荷的至少一部分发送到目的地设备。 目的地设备可以至少部分地由应用来指定。 许多替代方案，变化和修改是可能的。

    System and method for managing actions provided by a network using a policy tree
    9.
    发明授权
    System and method for managing actions provided by a network using a policy tree 有权
    用于管理由网络使用策略树提供的操作的系统和方法

    公开(公告)号：US06601082B1

    公开(公告)日：2003-07-29

    申请号：US09365101

    申请日：1999-07-30

    申请人： David M. Durham ,  Russell J. Fenger ,  Rajendra S. Yavatkar

    发明人： David M. Durham ,  Russell J. Fenger ,  Rajendra S. Yavatkar

    IPC分类号： G06F900

    CPC分类号： H04L41/28 ,  H04L63/0227 ,  H04L63/105

    摘要： A system and method for managing a network using a policy tree which includes a plurality of levels (e.g., two levels, five levels, etc.) is described. When the network receives a request to provide an action to a particular source, the network determines if the action is available as a function of at least one level of the plurality of levels. If the action is available, the network determines if the particular source is authorized to be provided with the action as a function of at least one rule of at least one further level of the plurality of levels. If the particular source is authorized, the network provides the action to the particular source.

    摘要翻译： 描述了使用包括多个级别（例如，两个级别，五个等级等）的策略树来管理网络的系统和方法。 当网络接收到向特定源提供动作的请求时，网络确定该动作是否可用作为多个级别中的至少一个级别的函数。 如果动作可用，则网络确定特定源是否被授权被提供作为多个级别中的至少一个进一步级别的至少一个规则的函数的动作。 如果特定的源被授权，则网络向特定的源提供动作。

    Page coloring to associate memory pages with programs
    10.
    发明授权
    Page coloring to associate memory pages with programs 有权
    页面着色以将内存页与程序相关联

    公开(公告)号：US09390031B2

    公开(公告)日：2016-07-12

    申请号：US11323446

    申请日：2005-12-30

    申请人： David M. Durham ,  Ravi L. Sahita ,  Dylan C. Larson ,  Rajendra S. Yavatkar

    发明人： David M. Durham ,  Ravi L. Sahita ,  Dylan C. Larson ,  Rajendra S. Yavatkar

    IPC分类号： G06F12/14 ,  G06F21/74 ,  G06F21/79

    CPC分类号： G06F12/1475 ,  G06F12/1491 ,  G06F21/74 ,  G06F21/79

    摘要： Apparatuses and methods for page coloring to associate memory pages with programs are disclosed. In one embodiment, an apparatus includes a paging unit and an interface to access a memory. The paging unit includes translation logic and comparison logic. The translation logic is to translate a first address to a second address. The first address is to be provided by an instruction stored in a first page in the memory. The translation is based on an entry in a data structure, and the entry is to include a base address of a second page in the memory including the second address. The comparison logic is to compare the color of the first page to the color of the second page. The color of the first page is to indicate association of the first page with a first program including the first instruction. The data structure entry is also to include the color of the second page to indicate association of the second page with the first program or a second program.

    摘要翻译： 公开了用于将内存页与程序相关联的页着色的装置和方法。 在一个实施例中，一种装置包括寻呼单元和用于访问存储器的接口。 寻呼单元包括翻译逻辑和比较逻辑。 翻译逻辑是将第一个地址转换为第二个地址。 第一个地址由存储在第一页的指令提供。 翻译是基于数据结构中的条目，并且该条目是在包括第二地址的存储器中包括第二页的基地址。 比较逻辑是将第一页的颜色与第二页的颜色进行比较。 第一页的颜色是指示第一页与包括第一指令的第一程序的关联。 数据结构条目还包括第二页的颜色以指示第二页与第一程序或第二程序的关联。