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1.发明申请System and method of obtaining data-dependent jitter (DDJ) estimates from measured signal data 有权从测量信号数据获取数据相关抖动（DDJ）估计的系统和方法公开(公告)号：US20060047450A1
公开(公告)日：2006-03-02
申请号：US10930683
申请日：2004-08-31
IPC分类号： G06F19/00
CPC分类号： G01R31/31709
摘要： Methods for estimating data-dependent jitter (DDJ) from measured samples of a transmitted data signal include a first exemplary step of obtaining a plurality of measurements (e.g., time tags and event counts for selected pulse widths in the data signal). Such measurements may be obtained at predetermined intervals within a transmitted signal or may be obtained at randomly selected intervals, and should yield measurements for each data pulse in a repeating data pattern. An average unit interval value representative of the average bit time of the transmitted signal is determined. Time interval error estimates representative of the timing deviation from each signal edge's measured value relative to its ideal value (determined in part from the calculated average unit interval value) are also determined, as well as a classification for each measured signal edge relative to a corresponding data pulse in the repeating data pattern. DDJ delta lines are then calculated for signal edges of each pulse width in the transmitted data pattern, from which peak-to-peak DDJ values and/or estimates of duty-cycle-distortion (DCD) can be determined.
摘要翻译： 用于从发送的数据信号的测量样本估计数据相关抖动（DDJ）的方法包括获得多个测量（例如，数据信号中所选择的脉冲宽度的时间标签和事件计数）的第一示例性步骤。 这样的测量可以以发送信号内的预定间隔获得，或者可以以随机选择的间隔获得，并且应该产生重复数据模式中每个数据脉冲的测量。 确定表示发送信号的平均位时间的平均单位间隔值。 时间间隔误差估计代表每个信号边缘的测量值相对于其理想值的时间偏差（由计算出的平均单位间隔值部分确定），以及相对于相应的每个测量信号边缘的分类 重复数据模式中的数据脉冲。 然后针对发送数据模式中的每个脉冲宽度的信号边缘计算DDJ delta线，从而可以确定峰 - 峰DDJ值和/或占空比失真（DCD）的估计。
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2.发明申请System and method of generating test signals with injected data-dependent jitter (DDJ) 有权利用注入的数据相关抖动（DDJ）产生测试信号的系统和方法公开(公告)号：US20060100801A1
公开(公告)日：2006-05-11
申请号：US10984547
申请日：2004-11-09
IPC分类号： G06F19/00
CPC分类号： G01R31/31709
摘要： A system and related method for generating a test signal with controllable amounts of signal jitter includes a pattern generator, a programmable arbitrary waveform generator (AWG) and a phase modulator. The pattern generator is configured to generate a data signal characterized by a given data pattern, bit rate and pattern length. A trigger signal representative of initial timing information associated with the data signal is provided to the AWG which subsequently generates a modulation signal with a frequency equal to the bit rate divided by the pattern length of the data signal. This modulation signal is provided to the phase modulator, along with a reference clock signal, and the phase modulator generates a modulated clock signal controlled by a phase modulation means (e.g., a controllable delay line) fed by the modulation signal. The resultant jittery clock signal is then provided to the pattern generator to adjust the timing of the data signal and to generate a signal representative of a data signal with data-dependent jitter characteristics. Additional inputs to the delay line of the pulse generator may include a random Gaussian noise signal for providing random jitter and a periodic signal for providing periodic jitter.
摘要翻译： 用于产生具有可控量的信号抖动的测试信号的系统和相关方法包括模式发生器，可编程任意波形发生器（AWG）和相位调制器。 图案生成器被配置为生成以给定数据模式，比特率和模式长度为特征的数据信号。 表示与数据信号相关联的初始定时信息的触发信号被提供给AWG，随后产生具有等于比特率除以数据信号的模式长度的频率的调制信号。 该调制信号与参考时钟信号一起提供给相位调制器，并且相位调制器产生由调制信号馈送的相位调制装置（例如，可控延迟线）控制的调制时钟信号。 然后将所得到的抖动时钟信号提供给模式发生器以调整数据信号的定时，并产生表示具有数据相关抖动特性的数据信号的信号。 脉冲发生器的延迟线的附加输入可以包括用于提供随机抖动的随机高斯噪声信号和用于提供周期性抖动的周期性信号。
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3.发明授权System and method of obtaining data-dependent jitter (DDJ) estimates from measured signal data 有权从测量信号数据获取数据相关抖动（DDJ）估计的系统和方法公开(公告)号：US07203610B2
公开(公告)日：2007-04-10
申请号：US10930683
申请日：2004-08-31
CPC分类号： G01R31/31709
摘要： Methods for estimating data-dependent jitter (DDJ) from measured samples of a transmitted data signal include a first exemplary step of obtaining a plurality of measurements (e.g., time tags and event counts for selected pulse widths in the data signal). Such measurements may be obtained at predetermined intervals within a transmitted signal or may be obtained at randomly selected intervals, and should yield measurements for each data pulse in a repeating data pattern. An average unit interval value representative of the average bit time of the transmitted signal is determined. Time interval error estimates representative of the timing deviation from each signal edge's measured value relative to its ideal value (determined in part from the calculated average unit interval value) are also determined, as well as a classification for each measured signal edge relative to a corresponding data pulse in the repeating data pattern. DDJ delta lines are then calculated for signal edges of each pulse width in the transmitted data pattern, from which peak-to-peak DDJ values and/or estimates of duty-cycle-distortion (DCD) can be determined.
摘要翻译： 用于从发送的数据信号的测量样本估计数据相关抖动（DDJ）的方法包括获得多个测量（例如，数据信号中所选择的脉冲宽度的时间标签和事件计数）的第一示例性步骤。 这样的测量可以以发送信号内的预定间隔获得，或者可以以随机选择的间隔获得，并且应该产生重复数据模式中每个数据脉冲的测量。 确定表示发送信号的平均位时间的平均单位间隔值。 时间间隔误差估计代表每个信号边缘的测量值相对于其理想值的时间偏差（由计算出的平均单位间隔值部分确定），以及相对于相应的每个测量信号边缘的分类 重复数据模式中的数据脉冲。 然后针对发送数据模式中的每个脉冲宽度的信号边缘计算DDJ delta线，从而可以确定峰 - 峰DDJ值和/或占空比失真（DCD）的估计。
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4.发明授权System and method of generating test signals with injected data-dependent jitter (DDJ) 有权利用注入的数据相关抖动（DDJ）产生测试信号的系统和方法公开(公告)号：US07239969B2
公开(公告)日：2007-07-03
申请号：US10984547
申请日：2004-11-09
IPC分类号： G01R29/26
CPC分类号： G01R31/31709
摘要： A system and related method for generating a test signal with controllable amounts of signal jitter includes a pattern generator, a programmable arbitrary waveform generator (AWG) and a phase modulator. The pattern generator is configured to generate a data signal characterized by a given data pattern, bit rate and pattern length. A trigger signal representative of initial timing information associated with the data signal is provided to the AWG which subsequently generates a modulation signal with a frequency equal to the bit rate divided by the pattern length of the data signal. This modulation signal is provided to the phase modulator, along with a reference clock signal, and the phase modulator generates a modulated clock signal controlled by a phase modulation means (e.g., a controllable delay line) fed by the modulation signal. The resultant jittery clock signal is then provided to the pattern generator to adjust the timing of the data signal and to generate a signal representative of a data signal with data-dependent jitter characteristics. Additional inputs to the delay line of the pulse generator may include a random Gaussian noise signal for providing random jitter and a periodic signal for providing periodic jitter.
摘要翻译： 用于产生具有可控量的信号抖动的测试信号的系统和相关方法包括模式发生器，可编程任意波形发生器（AWG）和相位调制器。 图案生成器被配置为生成以给定数据模式，比特率和模式长度为特征的数据信号。 表示与数据信号相关联的初始定时信息的触发信号被提供给AWG，随后产生具有等于比特率除以数据信号的模式长度的频率的调制信号。 该调制信号与参考时钟信号一起提供给相位调制器，并且相位调制器产生由调制信号馈送的相位调制装置（例如，可控延迟线）控制的调制时钟信号。 然后将所得到的抖动时钟信号提供给模式发生器以调整数据信号的定时，并产生表示具有数据相关抖动特性的数据信号的信号。 脉冲发生器的延迟线的附加输入可以包括用于提供随机抖动的随机高斯噪声信号和用于提供周期性抖动的周期性信号。
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5.发明授权Methods and apparatuses for external test methodology and initialization of input-output circuits 有权外部测试方法和输入输出电路初始化的方法和装置公开(公告)号：US07856581B1
公开(公告)日：2010-12-21
申请号：US11520530
申请日：2006-09-12
申请人： Sassan Tabatabaei , Yervant Zorian
发明人： Sassan Tabatabaei , Yervant Zorian
IPC分类号： G01R31/28
CPC分类号： G01R31/318572 , G01R31/318508
摘要： Various methods and apparatuses are described for a system that includes some on-chip components, e.g., I-Os, test processors, soft wrappers, etc., an external testing unit that provides Parametric Measurement Unit (PMU) capability, and various tests performed on the I-Os by the on-chip testing logic, the test vector patterns supplied by the external testing unit.
摘要翻译： 对于包括一些片上组件（例如，I-O，测试处理器，软封装等）的系统，提供参数测量单元（PMU）能力的外部测试单元以及执行的各种测试描述了各种方法和装置 在I-Os上通过片上测试逻辑，由外部测试单元提供的测试矢量模式。
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公开(公告)号：US07844022B2
公开(公告)日：2010-11-30
申请号：US11590652
申请日：2006-10-31
申请人： Sassan Tabatabaei
发明人： Sassan Tabatabaei
IPC分类号： H04L7/00
CPC分类号： G01R29/26 , G01R31/31709 , H04L1/205
摘要： The present subject matter is directed to methodologies for measuring jitter spectral content in a sampled signal using continuous time interval analyzers (CTIA) for characterization and test of clock signals and high-speed digital interfaces. The methodology takes advantage of anti-aliasing aspects of random sampling (RS) in a time interval error (TIE) based analysis methodology by randomizing timing of samples relative to signal edges and/or intervals between signal edges.
摘要翻译： 本主题涉及使用连续时间间隔分析器（CTIA）测量采样信号中的抖动频谱含量的方法，用于表征和测试时钟信号和高速数字接口。 该方法利用基于时间间隔误差（TIE）的分析方法中的随机抽样（RS）的抗锯齿方面，通过随机化样本相对于信号边缘的时序和/或信号边缘之间的间隔。
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公开(公告)号：US07598726B1
公开(公告)日：2009-10-06
申请号：US11510035
申请日：2006-08-24
申请人： Sassan Tabatabaei
发明人： Sassan Tabatabaei
IPC分类号： G01R31/28
CPC分类号： G01R31/318572 , G01R31/318508
摘要： Various methods and apparatuses are described for a system that includes some on-chip components, e.g., I/Os, test processors, soft wrappers, etc., an external testing unit that provides Parametric Measurement Unit (PMU) capability, a Device Interface Board (DIB) that includes resistors between the chip and the external tester, and various tests performed on the I/Os by the on-chip testing logic and external testing unit facilitated through the DIB.
摘要翻译： 对于包括一些芯片组件（例如I / O，测试处理器，软封装等）的系统，提供参数测量单元（PMU）能力的外部测试单元，设备接口板 （DIB），其包括芯片和外部测试仪之间的电阻，以及片上测试逻辑和外部测试单元通过DIB进行的对I / O执行的各种测试。
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8.发明授权公开(公告)号：US07590902B1
公开(公告)日：2009-09-15
申请号：US11520423
申请日：2006-09-12
申请人： Sassan Tabatabaei , Yervant Zorian
发明人： Sassan Tabatabaei , Yervant Zorian
IPC分类号： G01R31/28
CPC分类号： G01R31/318572 , G01R31/318508
摘要： Various methods and apparatuses are described for a system that includes some on-chip components, e.g., I-Os, test processors, soft wrappers, etc., an external testing unit that provides Parametric Measurement Unit (PMU) capability, and various tests performed on the I-Os by the on-chip testing logic, the test vector patterns supplied by the external testing unit.
摘要翻译： 对于包括一些片上组件（例如，I-O，测试处理器，软封装等）的系统，提供参数测量单元（PMU）能力的外部测试单元以及执行的各种测试描述了各种方法和装置 在I-Os上通过片上测试逻辑，由外部测试单元提供的测试矢量模式。
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公开(公告)号：US20090132207A1
公开(公告)日：2009-05-21
申请号：US12267107
申请日：2008-11-07
申请人： Sassan Tabatabaei
发明人： Sassan Tabatabaei
IPC分类号： G01R23/00
CPC分类号： G01R31/31709
摘要： Disclosed is a system and related methodology for providing fast low frequency jitter rejection in the measurement of signals under test. A signal under test may be sampled alternately with a reference signal under similar conditions. The resulting sampled signal blocks may then be processed to subtract the known calibrated value of the reference signal from the average signal under test.
摘要翻译： 公开了一种用于在测量被测信号时提供快速低频抖动抑制的系统和相关方法。 在类似条件下，可以用参考信号交替地对被测信号进行采样。 然后可以对所得到的采样信号块进行处理，以从所测试的平均信号中减去参考信号的已知校准值。
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公开(公告)号：US20060161361A1
公开(公告)日：2006-07-20
申请号：US11301275
申请日：2005-12-08
申请人： Sassan Tabatabaei
发明人： Sassan Tabatabaei
IPC分类号： G06F19/00
CPC分类号： G01R31/31709 , H04L1/205
摘要： Methodologies are disclosed for analyzing periodic jitter is a signal pattern using a continuous time interval analyzer. Sampled signal patterns may be correlated using time interval error calculations to determine start and stop sequences within sampled blocks of signal data while sampling synchronization may be achieved based on time interval calculations or pattern interval error calculations.
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