专利检索 ap:("Satish Damaraju" OR "Subramaniam Maiyuran" OR "Truyen Trinh" OR "Parag Raval" OR "Peter Smith") AND inv:"Parag Raval" 第 1 页

1.

发明申请
Power-performance modulation in caches using a smart least recently used scheme 失效
标题翻译：使用智能最近最近使用的方案在高速缓存中进行功率性能调制

公开(公告)号：US20070260818A1

公开(公告)日：2007-11-08

申请号：US11418883

申请日：2006-05-04

申请人： Satish Damaraju , Subramaniam Maiyuran , Truyen Trinh , Parag Raval , Peter Smith

发明人： Satish Damaraju , Subramaniam Maiyuran , Truyen Trinh , Parag Raval , Peter Smith

IPC分类号： G06F12/00

CPC分类号： G06F12/0864 , G06F12/123 , G06F2212/1028 , G06F2212/601 , Y02D10/13

摘要： The number of ways in an N-way set associative sequential cache is modulated to trade power and performance. Way selection is restricted during the allocation based on address so that only a subset of the N-ways is used for a range of addresses allowing the N-ways that are not in use to be powered off.

摘要翻译： N路集合关联顺序高速缓存中的方式的数量被调制以交易功率和性能。在基于地址的分配期间，路由选择被限制，使得只有N个路径的子集被用于允许不使用的N路被关闭的一系列地址。

2.

发明授权
Power-performance modulation in caches using a smart least recently used scheme 失效
标题翻译：使用智能最近最近使用的方案在高速缓存中进行功率性能调制

公开(公告)号：US07689772B2

公开(公告)日：2010-03-30

申请号：US11418883

申请日：2006-05-04

申请人： Satish Damaraju , Subramaniam Maiyuran , Truyen Trinh , Parag Raval , Peter Smith

发明人： Satish Damaraju , Subramaniam Maiyuran , Truyen Trinh , Parag Raval , Peter Smith

IPC分类号： G06F12/00 , G06F13/00

CPC分类号： G06F12/0864 , G06F12/123 , G06F2212/1028 , G06F2212/601 , Y02D10/13

摘要： The number of ways in an N-way set associative sequential cache is modulated to trade power and performance. Way selection is restricted during the allocation based on address so that only a subset of the N-ways is used for a range of addresses allowing the N-ways that are not in use to be powered off.

摘要翻译： N路集合关联顺序高速缓存中的方式的数量被调制以交易功率和性能。在基于地址的分配期间，路由选择被限制，使得只有N个路径的子集被用于允许不使用的N路被关闭的一系列地址。