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公开(公告)号:US20110012629A1
公开(公告)日:2011-01-20
申请号:US12503116
申请日:2009-07-15
申请人: Satya N. Chakravarti , Dechao Guo , Chuck T. Le , Byoung W. Min , Rajeevakumar V. Thekkemadathil , Keith Kwong Hon Wong
发明人: Satya N. Chakravarti , Dechao Guo , Chuck T. Le , Byoung W. Min , Rajeevakumar V. Thekkemadathil , Keith Kwong Hon Wong
CPC分类号: H01L27/0617 , H01L23/5252 , H01L27/112 , H01L27/11206 , H01L29/4966 , H01L29/66545 , H01L29/7833 , H01L2924/0002 , H01L2924/00
摘要: After planarization of a gate level dielectric layer, a dummy structure is removed to form a recess. A first conductive material layer and an amorphous metal oxide are deposited into the recess area. A second conduct material layer fills the recess. After planarization, an electrical antifuse is formed within the filled recess area, which includes a first conductive material portion, an amorphous metal oxide portion, and a second conductive material portion. To program the electrical antifuse, current is passed between the two terminals in the pair of the conductive contacts to transform the amorphous metal oxide portion into a crystallized metal oxide portion, which has a lower resistance. A sensing circuit determines whether the metal oxide portion is in an amorphous state (high resistance state) or in a crystalline state (low resistance state).
摘要翻译: 在栅极级介电层平坦化之后,去除虚拟结构以形成凹陷。 第一导电材料层和无定形金属氧化物沉积到凹陷区域中。 第二导电材料层填充凹部。 在平坦化之后,在填充的凹陷区域内形成电反熔丝,其包括第一导电材料部分,非晶金属氧化物部分和第二导电材料部分。 为了编程电反熔丝,电流在一对导电触头中的两个端子之间通过,以将非晶金属氧化物部分转变成具有较低电阻的结晶化金属氧化物部分。 感测电路确定金属氧化物部分是非晶态(高电阻状态)还是结晶态(低电阻状态)。
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公开(公告)号:US20120249160A1
公开(公告)日:2012-10-04
申请号:US13523120
申请日:2012-06-14
申请人: Satya N. Chakravarti , Dechao Guo , Chuck T. Le , Byoung W. Min , Rajeevakumar V. Thekkemadathil , Keith Kwong Hon Wong
发明人: Satya N. Chakravarti , Dechao Guo , Chuck T. Le , Byoung W. Min , Rajeevakumar V. Thekkemadathil , Keith Kwong Hon Wong
IPC分类号: H01L27/06 , G01R31/02 , H01H37/76 , H01L21/8232 , G01R27/08
CPC分类号: H01L27/0617 , H01L23/5252 , H01L27/112 , H01L27/11206 , H01L29/4966 , H01L29/66545 , H01L29/7833 , H01L2924/0002 , H01L2924/00
摘要: After planarization of a gate level dielectric layer, a dummy structure is removed to form a recess. A first conductive material layer and an amorphous metal oxide are deposited into the recess area. A second conduct material layer fills the recess. After planarization, an electrical antifuse is formed within the filled recess area, which includes a first conductive material portion, an amorphous metal oxide portion, and a second conductive material portion. To program the electrical antifuse, current is passed between the two terminals in the pair of the conductive contacts to transform the amorphous metal oxide portion into a crystallized metal oxide portion, which has a lower resistance. A sensing circuit determines whether the metal oxide portion is in an amorphous state (high resistance state) or in a crystalline state (low resistance state).
摘要翻译: 在栅极级介电层平坦化之后,去除虚拟结构以形成凹陷。 第一导电材料层和无定形金属氧化物沉积到凹陷区域中。 第二导电材料层填充凹部。 在平坦化之后,在填充的凹陷区域内形成电反熔丝,其包括第一导电材料部分,非晶金属氧化物部分和第二导电材料部分。 为了编程电反熔丝,电流在一对导电触头中的两个端子之间通过,以将非晶金属氧化物部分转变成具有较低电阻的结晶化金属氧化物部分。 感测电路确定金属氧化物部分是非晶态(高电阻状态)还是结晶态(低电阻状态)。
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公开(公告)号:US09059006B2
公开(公告)日:2015-06-16
申请号:US13523120
申请日:2012-06-14
申请人: Satya N. Chakravarti , Dechao Guo , Chuck T. Le , Byoung W. Min , Thekkemadathil V. Rajeevakumar , Keith Kwong Hon Wong
发明人: Satya N. Chakravarti , Dechao Guo , Chuck T. Le , Byoung W. Min , Thekkemadathil V. Rajeevakumar , Keith Kwong Hon Wong
IPC分类号: G01R27/08 , H01L23/52 , H01L29/10 , H01L27/06 , H01L23/525 , H01L27/112 , H01L29/66 , H01L29/49 , H01L29/78
CPC分类号: H01L27/0617 , H01L23/5252 , H01L27/112 , H01L27/11206 , H01L29/4966 , H01L29/66545 , H01L29/7833 , H01L2924/0002 , H01L2924/00
摘要: After planarization of a gate level dielectric layer, a dummy structure is removed to form a recess. A first conductive material layer and an amorphous metal oxide are deposited into the recess area. A second conduct material layer fills the recess. After planarization, an electrical antifuse is formed within the filled recess area, which includes a first conductive material portion, an amorphous metal oxide portion, and a second conductive material portion. To program the electrical antifuse, current is passed between the two terminals in the pair of the conductive contacts to transform the amorphous metal oxide portion into a crystallized metal oxide portion, which has a lower resistance. A sensing circuit determines whether the metal oxide portion is in an amorphous state (high resistance state) or in a crystalline state (low resistance state).
摘要翻译: 在栅极级介电层平坦化之后,去除虚拟结构以形成凹陷。 第一导电材料层和无定形金属氧化物沉积到凹陷区域中。 第二导电材料层填充凹部。 在平坦化之后,在填充的凹陷区域内形成电反熔丝,其包括第一导电材料部分,非晶金属氧化物部分和第二导电材料部分。 为了编程电反熔丝,电流在一对导电触点中的两个端子之间通过,以将非晶金属氧化物部分转变成具有较低电阻的结晶化金属氧化物部分。 感测电路确定金属氧化物部分是非晶态(高电阻状态)还是结晶态(低电阻状态)。
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公开(公告)号:US08237457B2
公开(公告)日:2012-08-07
申请号:US12503116
申请日:2009-07-15
申请人: Satya N. Chakravarti , Dechao Guo , Chuck T. Le , Byoung W. Min , Thekkemadathil V. Rajeevakumar , Keith Kwong Hon Wong
发明人: Satya N. Chakravarti , Dechao Guo , Chuck T. Le , Byoung W. Min , Thekkemadathil V. Rajeevakumar , Keith Kwong Hon Wong
CPC分类号: H01L27/0617 , H01L23/5252 , H01L27/112 , H01L27/11206 , H01L29/4966 , H01L29/66545 , H01L29/7833 , H01L2924/0002 , H01L2924/00
摘要: After planarization of a gate level dielectric layer, a dummy structure is removed to form a recess. A first conductive material layer and an amorphous metal oxide are deposited into the recess area. A second conduct material layer fills the recess. After planarization, an electrical antifuse is formed within the filled recess area, which includes a first conductive material portion, an amorphous metal oxide portion, and a second conductive material portion. To program the electrical antifuse, current is passed between the two terminals in the pair of the conductive contacts to transform the amorphous metal oxide portion into a crystallized metal oxide portion, which has a lower resistance. A sensing circuit determines whether the metal oxide portion is in an amorphous state (high resistance state) or in a crystalline state (low resistance state).
摘要翻译: 在栅极级介电层平坦化之后,去除虚拟结构以形成凹陷。 第一导电材料层和无定形金属氧化物沉积到凹陷区域中。 第二导电材料层填充凹部。 在平坦化之后,在填充的凹陷区域内形成电反熔丝,其包括第一导电材料部分,非晶金属氧化物部分和第二导电材料部分。 为了编程电反熔丝,电流在一对导电触头中的两个端子之间通过,以将非晶金属氧化物部分转变成具有较低电阻的结晶化金属氧化物部分。 感测电路确定金属氧化物部分是非晶态(高电阻状态)还是结晶态(低电阻状态)。
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