公开(公告)号：US20020147945A1

公开(公告)日：2002-10-10

申请号：US10061470

申请日：2002-02-01

Applicant: Seagate Technology LLC

Inventor： Travis D. Fox ,  Edwin S. Olds ,  Mark A. Thiessen

IPC: H04L001/22

CPC classification number: G11B19/048

Abstract: A system for evaluating whether an interface between a host device and a target device complies with specifications of an industry standard, such as, without limitation, SCSI, Serial ATA, Parallel ATA and Fibre Channel Arbitrated Loop, is disclosed. The system scans a communication trace between the host device and the target device to detect a timing measure present in the communication trace. The timing measure begins with a start condition and terminates with an ending condition. The start and ending conditions may be functions of logic transitions on either multiple or single signal lines in the communication trace. After a timing measure is detected, the system evaluates the length of the timing measure against a timing measure protocol specified by the industry standard. A computer-readable program storage device which tangibly embodies a program of instructions executable by a computer system for evaluating whether the interface complies with the industry standard is also disclosed.

Abstract translation: 公开了一种用于评估主机设备和目标设备之间的接口是否符合行业标准（例如但不限于SCSI，串行ATA，并行ATA和光纤通道仲裁环路）的规范的系统。 系统扫描主机设备和目标设备之间的通信跟踪，以检测通信跟踪中存在的定时测量。 时间测量从开始条件开始，并以终止条件终止。 开始和结束条件可以是通信跟踪中的多个或单个信号线上的逻辑转换的功能。 在检测到定时测量之后，系统根据行业标准规定的定时测量协议来评估定时测量的长度。 还公开了一种计算机可读程序存储装置，其有形地体现了可由计算机系统执行的用于评估接口是否符合行业标准的指令程序的程序。

公开(公告)号：US20040088480A1

公开(公告)日：2004-05-06

申请号：US10602254

申请日：2003-06-23

Applicant: Seagate Technology LLC

Inventor： Travis D. Fox ,  Edwin S. Olds ,  Mark A. Gaertner ,  Abbas Ali

IPC: G06F012/00

CPC classification number: G06F3/0611 ,  G06F3/0656 ,  G06F3/0659 ,  G06F3/0676 ,  G06F12/0862 ,  G06F12/0866

Abstract: A method for determining a speculative data acquisition in conjunction with an execution of a first access command relative to an execution of a second access command through execution of the read look ahead routine is disclosed. The method includes reading the first and second access commands from a memory; deciding a data proximate the first command has a heightened opportunity of servicing a future request for data; and deducing a time period for acquiring the data based on an execution priority of the second access command.

Abstract translation: 公开了一种通过执行读取的前瞻程序来确定与第一访问命令的执行相关的执行第二访问命令的推测数据获取的方法。 该方法包括从存储器读取第一和第二访问命令; 决定靠近第一个命令的数据有更高的机会来维护将来的数据请求; 并且基于第二访问命令的执行优先级推定用于获取数据的时间段。

公开(公告)号：US20030200393A1

公开(公告)日：2003-10-23

申请号：US10345476

申请日：2003-01-15

Applicant: Seagate Technology LLC

Inventor： Stephen R. Cornaby ,  Travis D. Fox ,  Edwin S. Olds

IPC: G06F012/00

CPC classification number: G06F12/0862 ,  G06F12/0866 ,  G06F12/122 ,  G06F12/123 ,  G06F2212/312

Abstract: A data storage device with a cache memory in communication with a control processor programmed with a routine to effect data throughput with a host device. The data storage device includes a head-disc assembly responsive to the control processor retrieving a host data along with a speculative data in a form of a read data. The control processor adjusting a range for acquisition of the speculative data based on data stored in cache memory fragments of the cache memory. The cache memory storing the read data in an unused cache memory fragment, while the control processor updates a history queue and a band count table based on the acquired read data and releases an oldest cache memory fragment with a lowest count value in the band count table from the cache memory in response to a need for cache memory space.

Abstract translation: 一种数据存储设备，其具有与用例程一起编程的控制处理器通信的高速缓冲存储器，以利用主机设备来实现数据吞吐量。 数据存储设备包括头盘组件，其响应于控制处理器以读取数据的形式检索主机数据以及推测数据。 控制处理器基于存储在高速缓冲存储器的高速缓存存储器片段中的数据来调整用于获取推测数据的范围。 高速缓存存储器将读取的数据存储在未使用的高速缓冲存储器片段中，而控制处理器基于所获取的读取数据更新历史队列和频带计数表，并且在频带计数表中释放具有最低计数值的最旧的高速缓存存储器片段 从高速缓冲存储器响应需要缓存的内存空间。

公开(公告)号：US20030200386A1

公开(公告)日：2003-10-23

申请号：US10303125

申请日：2002-11-22

Applicant: Seagate Technology LLC

Inventor： Mark D. Hertz ,  Stephen R. Cornaby ,  Travis D. Fox ,  Edwin S. Olds

IPC: G06F012/00

CPC classification number: G06F12/127 ,  G06F12/0862 ,  G06F12/0866

Abstract: A data storage device with a cache memory in communication with a control processor programmed with a data retention prioritization routine to effect data throughput with a host device. The data storage device includes an apparatus responsive to the control processor retrieving host data along with speculative data. The cache memory storing the host data in addition to the speculative data, wherein the speculative data includes both read on arrival data and read look ahead data. The control processor executing the data prioritization routine to prioritize removal of the host data from the cache memory prior to removal of the read on arrival data while maintaining persistence of the read look ahead data in the cache memory subsequent to removal of the read on arrival data.

Abstract translation: 一种数据存储设备，其具有与控制处理器通信的高速缓冲存储器，所述控制处理器利用数据保留优先级程序编程，以利用主机设备来实现数据吞吐量。 数据存储装置包括响应于控制处理器检索主机数据以及推测数据的装置。 高速缓存存储除了推测数据之外的主机数据，其中推测数据包括读取到达数据和预读数据。 执行数据优先级例程的控制处理器在去除读取到达数据之前优先从高速缓存存储器移除主机数据，同时在删除读取到达数据之后保持高速缓冲存储器中的读取的前瞻数据的持续性 。

公开(公告)号：US20030105919A1

公开(公告)日：2003-06-05

申请号：US10143235

申请日：2002-05-10

Applicant: Seagate Technology LLC

Inventor： Edwin S. Olds ,  Jack A. Mobley ,  Mark D. Hertz ,  Kenny T. Coker

IPC: G06F012/08

CPC classification number: G06F3/0601 ,  G06F2003/0697

Abstract: Method and apparatus for transferring data between a host device and a data storage device having a first memory space and a second memory space. The host issues access commands to store and retrieve data. The device stores commands in the first memory space pending transfer to the second memory space. An interface circuit evaluates relative proximity of first and second sets of LBAs associated with pending first and second commands, and delays promotion of later pending commands in front of earlier pending commands during an overlap condition. If the overlap is caused by performance enhancing features (PEF) the PEFs are disabled so the commands can be scheduled for disc access. Indicators are set in the commands to signal that a PEF has caused the overlap and that PEF can be disabled. Values are added to indicators in the commands such that the PEFs can be modified and avoid overlaps.

Abstract translation: 用于在主机设备和具有第一存储器空间和第二存储器空间的数据存储设备之间传送数据的方法和装置。 主机发出访问命令来存储和检索数据。 设备将命令存储在第一存储器空间中，等待传送到第二存储器空间。 接口电路评估与等待的第一和第二命令相关联的第一组和第二组LBA的相对接近度，并且在重叠条件期间延迟提前稍早的待命命令。 如果重叠是由性能增强功能（PEF）引起的，则PEF被禁用，因此命令可以被调度用于光盘访问。 在命令中设置指示信号，指示PEF已经引起重叠，并且可以禁用PEF。 将值添加到命令中的指示符中，以便可以修改PEF并避免重叠。

公开(公告)号：US20030149837A1

公开(公告)日：2003-08-07

申请号：US10080813

申请日：2002-02-22

Applicant: Seagate Technology LLC

Inventor： Kenny T. Coker ,  Edwin S. Olds ,  Jack A. Mobley

IPC: G06F012/00

CPC classification number: G06F3/0601 ,  G06F2003/0697 ,  G11B5/09

Abstract: Method and apparatus for transferring data between a host device and a data storage device having a first memory space (such as a buffer) and a second memory space (such as magnetic discs). Data are stored on the discs in host-addressable data sectors. The data storage device is configured to operate in a local mode of operation and a nonlocal mode of operation. During the local mode, nonrequested user data are retrieved from the discs and placed into the buffer in anticipation of a future request for the nonrequested user data. During nonlocal mode, such nonrequested user data are not retrieved. An interface circuit monitors host data access patterns and dynamically switches between the nonlocal and local modes in relation to proximity of a data sector address of each most recently received read command to data sector addresses associated with previously received read commands.

Abstract translation: 用于在主机设备和具有第一存储器空间（例如缓冲器）和第二存储器空间（诸如磁盘）的数据存储设备之间传送数据的方法和装置。 数据存储在主机可寻址数据扇区中的光盘上。 数据存储设备被配置为在本地操作模式和非本地操作模式下操作。 在本地模式期间，预期将来对未请求的用户数据的请求，从盘中检索未请求的用户数据并将其放入缓冲器。 在非本地模式下，不会检索这些未请求的用户数据。 接口电路监视主机数据访问模式，并且相对于每个最近接收到的读取命令的数据扇区地址与先前接收的读取命令相关联的数据扇区地址的非局部和局部模式之间的动态切换。

公开(公告)号：US20030056060A1

公开(公告)日：2003-03-20

申请号：US10090876

申请日：2002-03-04

Applicant: Seagate Technology LLC

Inventor： Mark D. Hertz ,  Philip E. Cloud ,  Travis D. Fox ,  Edwin S. Olds

IPC: G06F012/00

CPC classification number: G06F3/0659 ,  G06F3/0613 ,  G06F3/064 ,  G06F3/0676

Abstract: Method and apparatus for transferring data between a host device and a data storage device having a first memory space and a second memory space. The host issues access commands to store and retrieve data. The device stores write data associated with write commands in the first memory space pending transfer to the second memory space. An interface circuit evaluates relative proximity of first and second sets of LBAs associated with pending first and second write commands, and forms an adaptive bidirectional write skip mask when the sets of LBAs fit within a predetermined mask interval. The mask is preferably slidably adjustable to encompass both sets of LBAs and is preferably expandable to accommodate additional sets of LBAs. The data within the mask are treated as a combined write command and are thereafter written in an order corresponding to an order in which the data appear in the mask.

Abstract translation: 用于在主机设备和具有第一存储器空间和第二存储器空间的数据存储设备之间传送数据的方法和装置。 主机发出访问命令来存储和检索数据。 该设备将与写命令相关联的写数据存储在第一存储器空间中，等待传送到第二存储器空间。 接口电路评估与等待的第一和第二写入命令相关联的第一组和第二组LBA的相对接近度，并且当LBA组合在预定的屏蔽间隔内时形成自适应双向写入跳过掩码。 掩模优选地可滑动地调节以包含两组LBA，并且优选地可扩展以容纳另外的一组LBA。 掩码内的数据被视为组合写入命令，然后以与数据出现在掩码中的顺序相对应的顺序写入。