公开(公告)号：US11157212B2

公开(公告)日：2021-10-26

申请号：US16946096

申请日：2020-06-05

Applicant: Seagate Technology LLC

Inventor： Robert Wayne Moss ,  Thomas V. Spencer ,  Eric James Behnke

IPC: G06F3/06

Abstract: Method and apparatus for managing data transfers. In some embodiments, first and second storage devices respectively include first and second controllers, first and second local memories, and first and second non-volatile memories (NVMs). A virtual controller memory buffer (CMB) is formed from a dedicated portion of each of the first and second local memories for control by a host device. The first controller receives a virtual command set from the host device, and extracts a first local command to transfer data between the host device and the first NVM. In some cases, the second controller also receives the virtual command set and concurrently extracts a different, second local command to transfer data between the host device and the second NVM. Alternatively, the first controller may extract and forward the second local command to the second controller. The first and second NVMs may form an NVMe (Non-Volatile Memory Express) namespace.

公开(公告)号：US20210191657A1

公开(公告)日：2021-06-24

申请号：US16946096

申请日：2020-06-05

Applicant: Seagate Technology LLC

Inventor： Robert Wayne Moss ,  Thomas V. Spencer ,  Eric James Behnke

IPC: G06F3/06

Abstract: Method and apparatus for managing data transfers. In some embodiments, first and second storage devices respectively include first and second controllers, first and second local memories, and first and second non-volatile memories (NVMs). A virtual controller memory buffer (CMB) is formed from a dedicated portion of each of the first and second local memories for control by a host device. The first controller receives a virtual command set from the host device, and extracts a first local command to transfer data between the host device and the first NVM. In some cases, the second controller also receives the virtual command set and concurrently extracts a different, second local command to transfer data between the host device and the second NVM. Alternatively, the first controller may extract and forward the second local command to the second controller. The first and second NVMs may form an NVMe (Non-Volatile Memory Express) namespace.

公开(公告)号：US20140281626A1

公开(公告)日：2014-09-18

申请号：US13844580

申请日：2013-03-15

Applicant: Seagate Technology LLC

Inventor： Scott Thomas Younger ,  Thomas John Skaar ,  Anthony L. Priborsky ,  Eric James Behnke

IPC: G06F1/32

CPC classification number: G06F1/3206 ,  G06F1/3203 ,  G06F1/3209 ,  G06F1/3215 ,  G06F1/3268 ,  G06F1/3287 ,  Y02D10/154 ,  Y02D10/171 ,  Y02D50/20

Abstract: Apparatus and method for supplying electrical power to a device. A system on chip (SOC) integrated circuit includes a first region having a processing core and a second region characterized as an always on domain (AOD) power island having a power control block with an energy detector coupled to a host input line. First and second power supply modules respectively supply power to the first and second regions. The second power supply module includes a main switch between the first power supply module and a host input voltage terminal. The power control block opens the main switch to enter a low power mode during which no power is supplied to the first region, and the power control block closes the main switch to resume application of power to the first region responsive to the energy detector detecting electrical energy on the host input line.

Abstract translation: 用于向设备供电的设备和方法。 片上系统（SOC）集成电路包括具有处理核心的第一区域和表征为总是在域（AOD）功率岛上的第二区域，具有功率控制块，功率控制块具有耦合到主机输入线的能量检测器。 第一和第二电源模块分别向第一和第二区域供电。 第二电源模块包括在第一电源模块和主机输入电压端子之间的主开关。 功率控制块打开主开关以进入低功率模式，在该模式期间不向第一区域供电，并且功率控制模块关闭主开关，以响应于能量检测器检测电气而恢复向第一区域施加电力 主机输入线上的能量。