公开(公告)号：US20220237008A1

公开(公告)日：2022-07-28

申请号：US17156344

申请日：2021-01-22

Applicant: Seagate Technology LLC

Inventor： Marc Tim JONES

IPC: G06F9/455 ,  G06F9/30

Abstract: The technology disclosed herein pertains to a system and method for providing optimization of embedded computation instruction set (CIS), the method including downloading the CIS to a computational storage device (CSD), committing the CIS to a program slot in a computational storage processor of the CSD, simulating execution of the CIS at the committed slot to generate static analysis of one or more registers of the CIS to determine ranges of values that the one or more registers can take through a lifecycle of the CIS, demoting one or more of the registers to lower size registers, and generating a native instruction set from the CIS based on the register demotions.

公开(公告)号：US20220318160A1

公开(公告)日：2022-10-06

申请号：US17218533

申请日：2021-03-31

Applicant: Seagate Technology LLC

Inventor： Marc Tim JONES

IPC: G06F13/16 ,  G06F9/445 ,  G06F13/42

Abstract: The technology disclosed herein provides a method including generating, at a PCIe interface, a functional capability table associating a plurality of computational functionalities (CFs) with a plurality of computational storage devices (CSDs) communicatively connected to each other via the PCIe interface, communicating the functional capability table to each of the plurality of CSDs, receiving, at a first of the plurality of CSDs (CSD1), a request for a computational process including the plurality of CFs, determining that a first of the CFs (CF1) is associated with the CSD1 and a second of the CFs (CF2) is associated with a CSD2, requesting a computational program memory (CPM2) at the CSD2 and performing the CF1 at CSD1.

公开(公告)号：US20220244960A1

公开(公告)日：2022-08-04

申请号：US17162957

申请日：2021-01-29

Applicant: Seagate Technology LLC

Inventor： Marc Tim JONES

IPC: G06F9/30 ,  G06F9/32 ,  G06F9/48 ,  G06F13/42

Abstract: The technology disclosed herein pertains to a system and method for profiling performance of an embedded computation instruction set (CIS), the method including receiving a profiling component to a computational storage device (CSD), the profiling component being configured to measure one or more execution parameters of a computational instruction set (CIS), executing the CIS at a program slot in a computational storage processor of the CSD, monitoring the execution of the CIS to generate a log of the execution parameters of the CIS, and communicating the log to a host in response to receiving a get-log page command.

公开(公告)号：US20230050976A1

公开(公告)日：2023-02-16

申请号：US17401076

申请日：2021-08-12

Applicant: Seagate Technology LLC

Inventor： Marc Tim JONES

IPC: G06F16/18 ,  G06F16/13 ,  G06F13/16 ,  G06F13/42

Abstract: The technology disclosed herein pertains to a system and method for providing the ability for a computational storage device (CSD) to understand data layout based upon automatic detection or host identification of the file system occupying a non-volatile memory express (NVMe) namespace, the method including receiving, at a CSD, a request to process a file using a computation program stored on the CSD, detecting a filesystem associated with the file within a namespace of CSD, mounting the filesystem on the CSD, interpreting a data structure associated with the file within the namespace, and reading the physical data blocks associated with the file into a computational storage memory (CSM) of the CSD.

公开(公告)号：US20220398442A1

公开(公告)日：2022-12-15

申请号：US17348569

申请日：2021-06-15

Applicant: Seagate Technology LLC

Inventor： Marc Tim JONES

IPC: G06N3/063 ,  G06N3/08

Abstract: Use of computational storage drives (CSDs) in a machine learning pipeline. The CSD may include a machine learning coprocessor capable of natively executing a machine learning model on raw data stored locally at the CSD. In turn, one or more lower order machine learning operations may be executed at a CSD in response to a read/transform command issued by a host. In turn, the CSD may return transformed data comprising data or metadata that is an output of the lower order machine learning operations. This approach may allow for application of a machine learning model locally to input data stored on the CSD having the machine learning coprocessor. This may avoid network bandwidth associated with traditional read and write operations for input and output data from a machine learning pipeline. Moreover, use of CSDs may provide highly parallelized processing using CSDs for application of machine learning operations at the edge of a network.

公开(公告)号：US20220391211A1

公开(公告)日：2022-12-08

申请号：US17819605

申请日：2022-08-12

Applicant: Seagate Technology LLC

Inventor： Marc Tim JONES

IPC: G06F9/30 ,  G06F9/32 ,  G06F13/42 ,  G06F9/48

Abstract: The technology disclosed herein pertains to a system and method for profiling performance of an embedded computation instruction set (CIS), the method including receiving a profiling component to a computational storage device (CSD), the profiling component being configured to measure one or more execution parameters of a computational instruction set (CIS), executing the CIS at a program slot in a computational storage processor of the CSD, monitoring the execution of the CIS to generate a log of the execution parameters of the CIS, and communicating the log to a host in response to receiving a get-log page command.

公开(公告)号：US20220350604A1

公开(公告)日：2022-11-03

申请号：US17245286

申请日：2021-04-30

Applicant: Seagate Technology LLC

Inventor： Marc Tim JONES

IPC: G06F9/30 ,  G06F9/50 ,  G06F13/362

Abstract: The technology disclosed herein provides a method including determining one or more dedicated computations storage programs (CSPs) used in a target market for a computational storage device, storing the dedicated CSPs in one or more pre-programmed computing instruction set (CIS) slots in the computational storage device, translating one or more instructions of the dedicated CSPs for processing using a native processor, loading one or more instructions of programmable CSPs to a CSP processor implemented within an application specific integrated circuit (ASIC) of the computational storage device, and processing the one or more instructions of the programmable CSPs using the CSP processor.