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公开(公告)号：US06424477B1
公开(公告)日：2002-07-23
申请号：US09268657
申请日：1999-03-16
IPC分类号： G11B509
CPC分类号： G11B20/1813 , G11B20/10527 , G11B20/1208 , G11B20/1809 , G11B27/3027 , G11B2020/10537 , G11B2220/90
摘要： In an apparatus for recording and reproducing a burst-like digital information signal, a method capable of predicting the time of occurrence of a header indicating the head of the first data of a digital information signal during its reproduction from a recording medium. The digital signal includes a plurality of data blocks each including a header indicative of the head of the block, and each header includes the address of the block. During recording of the digital signal on the recording medium, a plurality of headers which are substantially the same as the headers of the data blocks and including addresses having given relations with the addresses of the data blocks are inserted in a clock regenerating signal recorded before the digital signal for regenerating the clocks for the signal. The headers are inserted at a period equal to the length of each data block so as to be synchronized with the headers of the data blocks.
摘要翻译： 在用于记录和再现突发式数字信息信号的装置中，能够从记录介质预测在其再现期间表示数字信息信号的第一数据的头的头的出现时间的方法。 数字信号包括多个数据块，每个数据块包括指示块的头部的头部，并且每个头部包括块的地址。 在记录介质上记录数字信号的过程中，将与数据块的报头基本相同的多个报头与包含数据块的地址的地址对应的地址进行插入， 数字信号用于再生信号的时钟。 以等于每个数据块的长度的周期插入报头，以便与数据块的报头同步。
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2.发明授权Header information of information signal recording and reproducing method and apparatus therefor 失效信息信号记录和再现方法及其装置的标题信息
公开(公告)号：US5589995A
公开(公告)日：1996-12-31
申请号：US583861
申请日：1996-01-11
CPC分类号： G11B20/1813 , G11B20/10527 , G11B20/1208 , G11B20/1809 , G11B27/3027 , G11B2020/10537 , G11B2220/90
摘要： An apparatus for recording and reproducing a burst-like digital information signal, a method capable of predicting the time of occurrence of a header indicating the beginning of the first data of a digital information signal during its reproduction from a recording medium. The digital signal includes a plurality of data blocks, each including a first header indicative of the head of the block, and each first header including the address of the block. During recording of a digital signal on the recording medium, a plurality of second headers, which are substantially the same as the first headers of the data blocks and including addresses having given relations with the addresses of the data blocks, are inserted in a clock regenerating signal recorded before the digital signal for regenerating the clock for the signal. The second headers are inserted at a period equal to the period of each data block so as to be synchronized with the headers of the data blocks.
摘要翻译： 一种用于记录和再现突发式数字信息信号的装置，一种能够从记录介质预测在其再现期间指示数字信息信号的第一数据的开头的报头出现时间的方法。 数字信号包括多个数据块，每个数据块包括指示块的头部的第一标题，以及包括块的地址的每个第一标题。 在记录介质上记录数字信号时，与数据块的第一标题基本相同并包括与数据块的地址具有关系的地址的多个第二报头插入时钟再生 在数字信号之前记录的信号用于再生信号的时钟。 以等于每个数据块的周期的周期插入第二报头，以便与数据块的报头同步。
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公开(公告)号：US07019927B2
公开(公告)日：2006-03-28
申请号：US10673608
申请日：2003-09-30
IPC分类号： G11B5/09
CPC分类号： G11B20/1813 , G11B20/10527 , G11B20/1208 , G11B20/1809 , G11B27/3027 , G11B2020/10537 , G11B2220/90
摘要： In an apparatus for recording and reproducing a burst-like digital information signal, a method capable of predicting the time of occurrence of a header indicating the head of the first data of a digital information signal during its reproduction from a recording medium. The digital signal includes a plurality of data blocks each including a header indicative of the head of the block, and each header includes the address of the block. During recording of the digital signal on the recording medium, a plurality of headers which are substantially the same as the headers of the data blocks and including addresses having given relations with the addresses of the data blocks are inserted in a clock regenerating signal recorded before the digital signal for regenerating the clocks for the signal. The headers are inserted at a period equal to the length of each data block so as to be synchronized with the headers of the data blocks.
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公开(公告)号：US5956193A
公开(公告)日：1999-09-21
申请号：US714823
申请日：1996-09-17
CPC分类号： G11B20/1813 , G11B20/10527 , G11B20/1208 , G11B20/1809 , G11B27/3027 , G11B2020/10537 , G11B2220/90
摘要： An apparatus for recording and reproducing a burst-like digital information signal, and a method capable of predicting the time of occurrence of a header indicating the beginning of the first data of a digital information signal during its reproduction from a recording medium. The digital signal includes a plurality of data blocks, each including a first header indicative of the head of the block, and each first header including the address of the block. During recording of a digital signal on the recording medium, a plurality of second headers, which are substantially the same as the first headers of the data blocks and including addresses having given relations with the addresses of the data blocks, are inserted in a clock regenerating signal recorded before the digital signal for regenerating the clock for the signal. The second headers are inserted at a period equal to the period of each data block so as to be synchronized with the headers of the data blocks.
摘要翻译： 一种用于记录和再现突发式数字信息信号的装置，以及一种能够从记录介质预测在再现期间指示数字信息信号的第一数据的开头的报头出现时间的方法。 数字信号包括多个数据块，每个数据块包括指示块的头部的第一标题，以及包括块的地址的每个第一标题。 在记录介质上记录数字信号时，与数据块的第一标题基本相同并包括与数据块的地址具有关系的地址的多个第二报头插入时钟再生 在数字信号之前记录的信号用于再生信号的时钟。 以等于每个数据块的周期的周期插入第二报头，以便与数据块的报头同步。
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公开(公告)号：US06657831B2
公开(公告)日：2003-12-02
申请号：US10187298
申请日：2002-07-02
IPC分类号： G11B509
CPC分类号： G11B20/1813 , G11B20/10527 , G11B20/1208 , G11B20/1809 , G11B27/3027 , G11B2020/10537 , G11B2220/90
摘要： In an apparatus for recording and reproducing a burst-like digital information signal, a methd capable of predicting the time of occurrence of a header indicating the head of the first data of a digital information signal during its reproduction from a recording medium. The digital signal includes a plurality of data blocks each including a header indicative of the head of the block, and each header includes the address of the block. During recording of the digital signal on the recording medium, a plurality of headers which are substantially the same as the headers of the data blocks and including addresses having given relations with the addresses of the data blocks are inserted in a clock regenerating signal recorded before the digital signal for regenerating the clocks for the signal. The headers are inserted at a period equal to the length of each data block so as to be synchronized with the headers of the data blocks.
摘要翻译： 在用于记录和再现突发式数字信息信号的装置中，能够从记录介质预测在其再现期间指示数字信息信号的第一数据的头的头的出现时间的方法。 数字信号包括多个数据块，每个数据块包括指示块的头部的头部，并且每个头部包括块的地址。 在记录介质上记录数字信号的过程中，将与数据块的报头基本相同的多个报头与包含数据块的地址的地址对应的地址进行插入， 数字信号用于再生信号的时钟。 以等于每个数据块的长度的周期插入报头，以便与数据块的报头同步。
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公开(公告)号：US4961204A
公开(公告)日：1990-10-02
申请号：US353709
申请日：1989-05-18
CPC分类号： H04N5/928 , G11B20/1809
摘要： A PCM signal processing apparatus for recording or reproducing a PCM signal. The PCM signal reproducing apparatus of the invention is constituted by: a data addition circuit for receiving a first signal composed of n bits per word (n being an integer) and a second signal composed of n' bits per word (n' being an integer) as mode inputs different from each other, and for adding fixed data of (n-n') bits to every word of the second signal to thereby generate a third signal; a first switch device for receiving the first and third signals and for selectively outputting one of the first and third signals; a symbol generation circuit for converting every word of the output of the first switch device into symbol data of m.times.l bits (n>l); a signal processing circuit for performing at least interleave processing, error correction code generating processing, and addition of a synchronizing signal, on the output of the symbol generation circuit, to thereby generate a first data frame; a data deletion circuit for deleting the fixed data from the first data frame of the signal processing circuit to thereby generate a second data frame; and a second switch devices for receiving the first data frame from the signal processing circuit and the second data frame from the data deletion circuit.
摘要翻译： 一种用于记录或再现PCM信号的PCM信号处理装置。 本发明的PCM信号再现装置由以下部分构成：数据加法电路，用于接收由每个字n位（n为整数）组成的第一信号和由每个字n位（n'为整数）组成的第二信号 ）作为彼此不同的模式输入，并且用于将（n-n'）位的固定数据添加到第二信号的每个字，从而生成第三信号; 第一开关装置，用于接收第一和第三信号并选择性地输出第一和第三信号之一; 符号产生电路，用于将第一开关装置的输出的每个字转换成m×1位（n> 1）的符号数据; 信号处理电路，用于在符号生成电路的输出上执行至少交织处理，纠错码生成处理以及同步信号的相加，从而生成第一数据帧; 数据删除电路，用于从信号处理电路的第一数据帧中删除固定数据，从而生成第二数据帧; 以及用于从信号处理电路接收第一数据帧的第二开关装置和来自数据删除电路的第二数据帧。
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公开(公告)号：US20140199040A1
公开(公告)日：2014-07-17
申请号：US14116384
申请日：2012-05-10
IPC分类号： G02B6/02
CPC分类号： G02B6/02395 , C03C25/106 , C03C25/40 , G02B6/4436
摘要： Provided is an optical fiber which is provided with heat resistance and productivity and in which a transmission loss is suppressed even in a high-temperature environment. It has, on an outer periphery of a glass fiber composed of a core part and a cladding part, a coating layer made by crosslinking an energy-curable resin composition containing a silicon compound, in which the silicon compound contained in the energy-curable resin composition of the coating layer as an outermost layer has a specified structure having a cyclic silicone site having an epoxy group and a linear silicone site, with the content of the cyclic silicone site in the compound being from 10 to 30% by mass.
摘要翻译： 提供具有耐热性和生产率的光纤，即使在高温环境下也能抑制传输损失。 在由芯部和包层部分构成的玻璃纤维的外周上，通过将含有硅化合物的能量固化树脂组合物交联而制成的涂层，其中包含在能量固化树脂中的硅化合物 作为最外层的涂层的组成具有具有环氧基和环状硅氧烷部位的环状硅氧烷部位的特定结构，化合物中的环状硅氧烷部位的含量为10〜30质量％。
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8.发明授权Apparatus and method for controlling grille aperture ratios of a plurality of air transfer grilles 有权用于控制多个空气传送格栅的格栅孔径比的装置和方法公开(公告)号：US08768519B2
公开(公告)日：2014-07-01
申请号：US12782878
申请日：2010-05-19
申请人： Ikuro Nagamatsu , Junichi Ishimine , Seiichi Saito , Masahiro Suzuki , Tadashi Katsui , Yuji Ohba , Nobuyoshi Yamaoka , Akira Ueda , Yasushi Uraki
发明人： Ikuro Nagamatsu , Junichi Ishimine , Seiichi Saito , Masahiro Suzuki , Tadashi Katsui , Yuji Ohba , Nobuyoshi Yamaoka , Akira Ueda , Yasushi Uraki
CPC分类号： H05K7/20836
摘要： An apparatus for controlling grille aperture ratios of a plurality of air transfer grilles which are installed in a room, includes a determining unit for determining target grille air volumes of air blowing to the racks, for determining simulation air volumes of air blowing from the air transfer grilles on the basis of the target grille air volumes so that each of air of the target grille air volumes are blown to the racks, and for determining grille aperture ratios for each of the air transfer grilles on the basis of the plurality of simulation air volumes so that each of the amounts of air blowing from the air transfer grilles is replaced by each of the simulation air volumes, and a controller for controlling each of the grille aperture ratios of the air transfer grilles on the basis of each of the determined grille aperture ratios.
摘要翻译： 一种用于控制安装在房间中的多个空气传送格栅的格栅孔径比的装置，包括：确定单元，用于确定向机架吹送的空气的目标格栅空气体积，用于确定从空气传送中吹出的空气的模拟空气体积 基于目标格栅空气体积格栅，使得目标格栅空气体积的每个空气被吹送到机架，并且基于多个模拟空气体积确定每个空气传送格栅的格栅孔径比 使得从空气传送格栅吹出的每个空气量被每个模拟空气量所取代;以及控制器，用于基于每个确定的格栅孔径来控制空气传送格栅的每个格栅孔径比 比率。
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公开(公告)号：US08063768B2
公开(公告)日：2011-11-22
申请号：US11792057
申请日：2005-04-14
IPC分类号： H04Q1/30
CPC分类号： H04B3/56 , H04B2203/5483
摘要： Provided is a modem apparatus of power line communication using a power line as a transmission path. The modem apparatus includes: an amplifier for amplifying communication signals and outputting a differential signal obtained from a pair of output signals having a phase difference of 180 degrees therebetween; a signal transformer for applying the amplified communication signals to the power lines; and a balance circuit connected at the primary side of the signal transformer, for enhancing circuit balancing. The balance circuit is constituted by a variable element capable of changing an element value, and there is provided a common mode detecting circuit that detects a common mode current flowing through the secondary side of the signal transformer and that changes the element value of the variable element of the balance circuit such that the detected common mode current becomes small.
摘要翻译： 提供了使用电力线作为传输路径的电力线通信的调制解调器装置。 调制解调器装置包括：放大器，用于放大通信信号并输出从具有180度相位差的一对输出信号获得的差分信号; 用于将放大的通信信号施加到电力线的信号变换器; 以及连接在信号变压器初级侧的平衡电路，用于增强电路平衡。 平衡电路由能够改变元件值的可变元件构成，并且提供了共模检测电路，其检测流过信号变压器次级侧的共模电流，并且改变可变元件的元件值 使得检测到的共模电流变小。
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公开(公告)号：US08018784B2
公开(公告)日：2011-09-13
申请号：US12636528
申请日：2009-12-11
CPC分类号： G06F1/3253 , G06F1/3237 , Y02D10/128 , Y02D10/151
摘要： To improve the speed of accessing a low-speed circuit block from a high-speed circuit block without significantly increasing power consumption.Ina data processor having a bus controller that performs timing control of access from the CPU operated in synchronization with a high-speed first clock signal to a peripheral circuit operated in synchronization with a low-speed second clock signal, a timing control circuit is provided between the peripheral circuit and the bus controller, and the bus controller causes, in response to a read instruction from the peripheral circuit, the timing control circuit to output data held by the peripheral circuit to the bus controller in synchronization with the cycle of the high-speed clock signal, causes the timing control circuit to start, in response to a write instruction directed to the peripheral circuit, writing into the peripheral circuit in synchronization with the cycle of the high-speed clock signal, and terminates the writing in synchronization with the cycle of the low-speed clock signal.
摘要翻译： 提高从高速电路块访问低速电路块的速度，而不会显着增加功耗。 Ina数据处理器具有总线控制器，其执行与高速第一时钟信号同步操作的CPU的访问定时控制到与低速第二时钟信号同步操作的外围电路，时序控制电路设置在 外围电路和总线控制器以及总线控制器响应于来自外围电路的读取指令，使定时控制电路与外围电路的高周期同步地将外围电路保持的数据输出到总线控制器， 响应于针对外围电路的写入指令，使定时控制电路开始与高速时钟信号的周期同步地写入外围电路，并且与该时钟信号同步地终止写入 周期的低速时钟信号。
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