公开(公告)号：US20130344681A1

公开(公告)日：2013-12-26

申请号：US13962326

申请日：2013-08-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Akihiro CHIDA ,  Yoshiaki OIKAWA ,  Chiho KAWANABE

IPC: H01L21/78

CPC classification number: H01L24/96 ,  H01L21/561 ,  H01L21/568 ,  H01L21/78 ,  H01L27/1262 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided is a method for manufacturing a semiconductor device, which prevents waste generation from being caused peeling of films and prevents failure of peeling from being caused by waste due to peeling of films. A first semiconductor substrate is used which has a structure in which a peeling layer is not formed in a section subjected to a first dividing treatment, so that the peeling layer is not exposed at the end surface of a second semiconductor substrate when the second semiconductor substrate is cut out of the first semiconductor substrate. In addition, a supporting material is provided on a layer to be peeled of the second semiconductor substrate before the second semiconductor substrate is subjected to a second dividing treatment.

Abstract translation: 提供一种制造半导体器件的方法，其防止废物产生被膜剥离，并防止由于剥离而导致的剥离不会导致剥离。 使用第一半导体基板，其具有其中在经受第一分割处理的部分中不形成剥离层的结构，使得当第二半导体基板上的剥离层不暴露在第二半导体基板的端面时 被切出第一半导体衬底。 另外，在对第二半导体衬底进行第二次分割处理之前，在要被剥离的第二半导体衬底的层上提供支撑材料。

公开(公告)号：US20150243738A1

公开(公告)日：2015-08-27

申请号：US14626049

申请日：2015-02-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Akihisa SHIMOMURA ,  Yasumasa YAMANE ,  Yuhei SATO ,  Takahisa ISHIYAMA ,  Kenichi OKAZAKI ,  Chiho KAWANABE ,  Masashi OOTA ,  Noritaka ISHIHARA

IPC: H01L29/24 ,  C01G15/00 ,  H01L27/12

CPC classification number: H01L29/7869 ,  C01G15/006 ,  C01P2002/72 ,  C01P2002/89 ,  C01P2004/04 ,  C01P2006/40 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/24 ,  H01L29/78696

Abstract: Favorable electrical characteristics are given to a semiconductor device. Furthermore, a semiconductor device having high reliability is provided. One embodiment of the present invention is an oxide semiconductor film having a plurality of electron diffraction patterns which are observed in such a manner that a surface where the oxide semiconductor film is formed is irradiated with an electron beam having a probe diameter whose half-width is 1 nm. The plurality of electron diffraction patterns include 50 or more electron diffraction patterns which are observed in different areas, the sum of the percentage of first electron diffraction patterns and the percentage of second electron diffraction patterns accounts for 100%, the first electron diffraction patterns account for 90% or more, the first electron diffraction pattern includes observed points which indicates that a c-axis is oriented in a direction substantially perpendicular to the surface where the oxide semiconductor film is formed.

Abstract translation: 给半导体器件提供有利的电特性。 此外，提供了具有高可靠性的半导体器件。 本发明的一个实施方案是具有多个电子衍射图案的氧化物半导体膜，其以使得形成氧化物半导体膜的表面被照射电子束，该电子束的半峰宽为 1nm。 多个电子衍射图案包括在不同区域中观察到的50个以上的电子衍射图案，第一电子衍射图案的百分比和第二电子衍射图案的百分比之和占100％，第一电子衍射图案占 90％以上时，第一电子衍射图案包括观察点，其表示c轴在与形成氧化物半导体膜的表面基本垂直的方向上取向。

公开(公告)号：US20160197193A1

公开(公告)日：2016-07-07

申请号：US15068708

申请日：2016-03-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Akihisa SHIMOMURA ,  Yasumasa YAMANE ,  Yuhei SATO ,  Takahisa ISHIYAMA ,  Kenichi OKAZAKI ,  Chiho KAWANABE ,  Masashi OOTA ,  Noritaka ISHIHARA

IPC: H01L29/786 ,  H01L29/04 ,  H01L27/12

CPC classification number: H01L29/7869 ,  C01G15/006 ,  C01P2002/72 ,  C01P2002/89 ,  C01P2004/04 ,  C01P2006/40 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/24 ,  H01L29/78696

Abstract: Favorable electrical characteristics are given to a semiconductor device. Furthermore, a semiconductor device having high reliability is provided. One embodiment of the present invention is an oxide semiconductor film having a plurality of electron diffraction patterns which are observed in such a manner that a surface where the oxide semiconductor film is formed is irradiated with an electron beam having a probe diameter whose half-width is 1 nm. The plurality of electron diffraction patterns include 50 or more electron diffraction patterns which are observed in different areas, the sum of the percentage of first electron diffraction patterns and the percentage of second electron diffraction patterns accounts for 100%, the first electron diffraction patterns account for 90% or more, the first electron diffraction pattern includes observed points which indicates that a c-axis is oriented in a direction substantially perpendicular to the surface where the oxide semiconductor film is formed.

公开(公告)号：US20150318359A1

公开(公告)日：2015-11-05

申请号：US14660000

申请日：2015-03-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Akihisa SHIMOMURA ,  Yuhei SATO ,  Yasumasa YAMANE ,  Shunpei YAMAZAKI ,  Kenichi OKAZAKI ,  Chiho KAWANABE

IPC: H01L29/24 ,  H01L27/12 ,  H01L29/786

CPC classification number: H01L29/7869 ,  H01B1/08 ,  H01L27/1225

Abstract: A semiconductor device with favorable electrical characteristics is provided. In an oxide semiconductor film, a plurality of electron diffraction patterns are observed in such a manner that a surface over which the oxide semiconductor film is formed is irradiated with an electron beam having a probe diameter whose half-width is 1 nm while the position of the film and the position of the electron beam are relatively moved. The electron diffraction patterns include 50 or more electron diffraction patterns observed in different areas. The sum of the percentage of first electron diffraction patterns and the percentage of second electron diffraction patterns accounts for 100%. The first electron diffraction patterns account for 50% or more. The first electron diffraction pattern includes observation points that are not symmetry or observation points disposed in a circular pattern. The second electron diffraction pattern includes observation points corresponding to the vertices of a hexagon.

Abstract translation: 提供了具有良好电气特性的半导体器件。 在氧化物半导体膜中，以这样的方式观察多个电子衍射图案，使得形成氧化物半导体膜的表面用半宽度为1nm的探针直径的电子束照射，同时， 膜和电子束的位置相对移动。 电子衍射图案包括在不同区域中观察到的50个或更多个电子衍射图。 第一电子衍射图的百分比和第二电子衍射图的百分比之和为100％。 第一电子衍射图案占50％以上。 第一电子衍射图案包括不对称的观察点或以圆形图案设置的观察点。 第二电子衍射图包括对应于六边形顶点的观察点。

公开(公告)号：US20170141233A1

公开(公告)日：2017-05-18

申请号：US15417266

申请日：2017-01-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Akihisa SHIMOMURA ,  Yasumasa YAMANE ,  Yuhei SATO ,  Takahisa ISHIYAMA ,  Kenichi OKAZAKI ,  Chiho KAWANABE ,  Masashi OOTA ,  Noritaka ISHIHARA

IPC: H01L29/786 ,  H01L29/04 ,  H01L27/12 ,  H01L29/24

CPC classification number: H01L29/7869 ,  C01G15/006 ,  C01P2002/72 ,  C01P2002/89 ,  C01P2004/04 ,  C01P2006/40 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/24 ,  H01L29/78696

Abstract: Favorable electrical characteristics are given to a semiconductor device. Furthermore, a semiconductor device having high reliability is provided. One embodiment of the present invention is an oxide semiconductor film having a plurality of electron diffraction patterns which are observed in such a manner that a surface where the oxide semiconductor film is formed is irradiated with an electron beam having a probe diameter whose half-width is 1 nm. The plurality of electron diffraction patterns include 50 or more electron diffraction patterns which are observed in different areas, the sum of the percentage of first electron diffraction patterns and the percentage of second electron diffraction patterns accounts for 100%, the first electron diffraction patterns account for 90% or more, the first electron diffraction pattern includes observed points which indicates that a c-axis is oriented in a direction substantially perpendicular to the surface where the oxide semiconductor film is formed.

公开(公告)号：US20150333036A1

公开(公告)日：2015-11-19

申请号：US14728134

申请日：2015-06-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Akihiro CHIDA ,  Yoshiaki OIKAWA ,  Chiho KAWANABE

IPC: H01L23/00

CPC classification number: H01L24/96 ,  H01L21/561 ,  H01L21/568 ,  H01L21/78 ,  H01L27/1262 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A first semiconductor substrate is used which has a structure in which a peeling layer is not formed in a section subjected to a first dividing treatment, so that the peeling layer is not exposed at the end surface of a second semiconductor substrate when the second semiconductor substrate is cut out of the first semiconductor substrate. In addition, a supporting material is provided on a layer to be peeled of the second semiconductor substrate before the second semiconductor substrate is subjected to a second dividing treatment.

Abstract translation: 使用第一半导体基板，其具有其中在经受第一分割处理的部分中不形成剥离层的结构，使得当第二半导体基板上的剥离层不暴露在第二半导体基板的端面时 被切出第一半导体衬底。 另外，在对第二半导体衬底进行第二次分割处理之前，在要被剥离的第二半导体衬底的层上提供支撑材料。

公开(公告)号：US20140248744A1

公开(公告)日：2014-09-04

申请号：US14276239

申请日：2014-05-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Akihiro CHIDA ,  Yoshiaki OIKAWA ,  Chiho KAWANABE

IPC: H01L27/12 ,  H01L21/78

CPC classification number: H01L24/96 ,  H01L21/561 ,  H01L21/568 ,  H01L21/78 ,  H01L27/1262 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided is a method for manufacturing a semiconductor device, which prevents waste generation from being caused peeling of films and prevents failure of peeling from being caused by waste due to peeling of films. A first semiconductor substrate is used which has a structure in which a peeling layer is not formed in a section subjected to a first dividing treatment, so that the peeling layer is not exposed at the end surface of a second semiconductor substrate when the second semiconductor substrate is cut out of the first semiconductor substrate. In addition, a supporting material is provided on a layer to be peeled of the second semiconductor substrate before the second semiconductor substrate is subjected to a second dividing treatment.

Abstract translation: 提供一种制造半导体器件的方法，其防止废物产生被膜剥离，并防止由于剥离而导致的剥离不会导致剥离。 使用第一半导体基板，其具有其中在经受第一分割处理的部分中不形成剥离层的结构，使得当第二半导体基板上的剥离层不暴露在第二半导体基板的端面时 被切出第一半导体衬底。 另外，在对第二半导体衬底进行第二次分割处理之前，在要被剥离的第二半导体衬底的层上提供支撑材料。