公开(公告)号：US20170016934A1

公开(公告)日：2017-01-19

申请号：US15280777

申请日：2016-09-29

申请人： Semiconductor Manufacturing International (Beijing) Corporation ,  Semiconductor Manufacturing International (Shanghai) Corporation

发明人： Nan LI ,  Lilung LAI ,  Ling ZHU

IPC分类号： G01Q60/46

CPC分类号： G01Q60/46 ,  B32B37/18 ,  B32B38/10 ,  C23F1/00 ,  G01B21/20 ,  G01Q30/20 ,  H01L22/14

摘要： A method is provided for fabricating a semiconductor testing structure. The method includes providing a substrate having a to-be-tested device structure formed on a surface of the substrate, a dielectric layer formed on the surface of the substrate and a surface of the to-be-tested structure, and conductive structures and an insulation layer electrically insulating the conductive structures formed on a first surface of the dielectric layer. The method also includes planarizing the conductive structures and the insulation layer to remove the conductive structures and the insulation layer until the first surface of the dielectric layer is exposed; and bonding the first surface of the dielectric layer with a dummy wafer by an adhesive layer. Further, the method includes removing the substrate to expose a second surface relative to the first surface of the dielectric layer of the dielectric layer and a surface of the to-be-tested device structure.

摘要翻译： 提供了制造半导体测试结构的方法。 该方法包括提供具有形成在基板的表面上的被测试的器件结构的基板，形成在基板的表面上的电介质层和待测试结构的表面，以及导电结构和 绝缘层使形成在电介质层的第一表面上的导电结构电绝缘。 该方法还包括平坦化导电结构和绝缘层以去除导电结构和绝缘层，直到电介质层的第一表面露出为止; 以及通过粘合剂层将所述电介质层的第一表面与虚设晶片接合。 此外，该方法包括去除衬底以暴露相对于电介质层的电介质层的第一表面的第二表面和待测试器件结构的表面。