公开(公告)号：US07379011B2

公开(公告)日：2008-05-27

申请号：US11508616

申请日：2006-08-23

Applicant: Seog-heon Ham ,  Gunhee Han

Inventor： Seog-heon Ham ,  Gunhee Han

IPC: H03M1/58

CPC classification number: H03M1/58 ,  H03M1/123 ,  H03M1/56

Abstract: An image sensor comprises an active pixel sensor (APS) array, a first analog-to-digital converter (ADC), and a ramp signal generator. The APS array has includes a plurality of pixels of arranged in a second order two-dimensional matrix, and wherein the APS array generates a reset signal and an image signal for each pixel of selected columns. The first ADC has includes correlated double sampling (CDS) circuits for each column of the APS array, and wherein the first ADC generates a digital code corresponding to the difference between the reset signal and the image signal using an output ramp signal that is applied to the CDS circuits for each column. The ramp generator generates the output ramp signal in which a low illumination portion and a high illumination portion have different slopes.

Abstract translation: 图像传感器包括有源像素传感器（APS）阵列，第一模数转换器（ADC）和斜坡信号发生器。 APS阵列包括以二阶二维矩阵排列的多个像素，并且其中APS阵列为选定列的每个像素产生复位信号和图像信号。 第一ADC包括用于APS阵列的每列的相关双采样（CDS）电路，并且其中第一ADC使用输出斜坡信号产生与复位信号和图像信号之间的差相对应的数字码， 每列的CDS电路。 斜坡发生器产生输出斜坡信号，其中低照明部分和高照明部分具有不同的斜率。

公开(公告)号：US20070046513A1

公开(公告)日：2007-03-01

申请号：US11508616

申请日：2006-08-23

Applicant: Seog-heon Ham ,  Gunhee Han

Inventor： Seog-heon Ham ,  Gunhee Han

IPC: H03M1/06

CPC classification number: H03M1/58 ,  H03M1/123 ,  H03M1/56

Abstract: An image sensor comprises an active pixel sensor (APS) array, a first analog-to-digital converter (ADC), and a ramp signal generator. The APS array has includes a plurality of pixels of arranged in a second order two-dimensional matrix, and wherein the APS array generates a reset signal and an image signal for each pixel of selected columns. The first ADC has includes correlated double sampling (CDS) circuits for each column of the APS array, and wherein the first ADC generates a digital code corresponding to the difference between the reset signal and the image signal using an output ramp signal that is applied to the CDS circuits for each column. The ramp generator generates the output ramp signal in which a low illumination portion and a high illumination portion have different slopes.

Abstract translation: 图像传感器包括有源像素传感器（APS）阵列，第一模数转换器（ADC）和斜坡信号发生器。 APS阵列包括以二阶二维矩阵排列的多个像素，并且其中APS阵列为选定列的每个像素产生复位信号和图像信号。 第一ADC包括用于APS阵列的每列的相关双采样（CDS）电路，并且其中第一ADC使用输出斜坡信号产生与复位信号和图像信号之间的差相对应的数字码， 每列的CDS电路。 斜坡发生器产生输出斜坡信号，其中低照明部分和高照明部分具有不同的斜率。

公开(公告)号：US5977595A

公开(公告)日：1999-11-02

申请号：US878483

申请日：1997-06-18

Applicant: Seog-heon Ham

Inventor： Seog-heon Ham

IPC: H01L21/822 ,  H01L27/02 ,  H01L27/04 ,  H01L27/06 ,  H01L27/085 ,  H01L23/62

CPC classification number: H01L27/027 ,  H01L27/0288

Abstract: The present invention relates to an apparatus and method for protecting a semiconductor device, and more particularly to an n-type metal-oxide semiconductor (NMOS) transistor with a ladder structure, used for protecting a semiconductor device from electrostatic discharge. In the present invention, a plurality of drain branches are connected by resistors, and a contact point of the well and the source/well pattern is formed only alongside the drain branch of the ladder structure which is nearest an input/output terminal of the semiconductor device. Accordingly, the current is better dispersed to all of the drain branches, thereby preventing the voltage breakdown of the transistor due to heat caused by the localization of current in the drain branch farthest from the input/output terminal.

Abstract translation: 本发明涉及用于保护半导体器件的装置和方法，更具体地涉及用于保护半导体器件免于静电放电的具有梯形结构的n型金属氧化物半导体（NMOS）晶体管。 在本发明中，多个漏极分支通过电阻器连接，并且阱和源极/阱图案的接触点仅沿梯形结构的漏极分支形成，其最靠近半导体的输入/输出端子 设备。 因此，电流更好地分散到所有的漏极分支，从而防止由于在离输入/输出端子最远的漏极支路中的电流的定位引起的由于热引起的晶体管的电压击穿。

公开(公告)号：US20130134520A1

公开(公告)日：2013-05-30

申请号：US13611759

申请日：2012-09-12

Applicant: Shigenobu Maeda ,  Hyun-pil Noh ,  Choong-ho Lee ,  Seog-heon Ham

Inventor： Shigenobu Maeda ,  Hyun-pil Noh ,  Choong-ho Lee ,  Seog-heon Ham

IPC: H01L27/088

CPC classification number: H01L21/8236 ,  H01L21/77 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823462 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823857 ,  H01L25/00 ,  H01L27/00 ,  H01L27/0883 ,  H01L29/66545 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided are a semiconductor device including a high voltage transistor and a low voltage transistor and a method of manufacturing the same. The semiconductor device includes a semiconductor substrate including a high voltage region and a low voltage region; a high voltage transistor formed in the high voltage region and including a first active region, a first source/drain region, a first gate insulating layer, and a first gate electrode; and a low voltage transistor formed in the low voltage region and including a second active region, a second source/drain region, a second gate insulating layer, and a second gate electrode. The second source/drain region has a smaller thickness than a thickness of the first source/drain region.

Abstract translation: 提供了包括高压晶体管和低压晶体管的半导体器件及其制造方法。 半导体器件包括：包括高电压区域和低电压区域的半导体衬底; 形成在高电压区域中并包括第一有源区，第一源极/漏极区，第一栅极绝缘层和第一栅电极的高压晶体管; 以及形成在所述低电压区域中并包括第二有源区，第二源极/漏极区，第二栅极绝缘层和第二栅电极的低电压晶体管。 第二源极/漏极区域的厚度小于第一源极/漏极区域的厚度。

公开(公告)号：US08809990B2

公开(公告)日：2014-08-19

申请号：US13611759

申请日：2012-09-12

Applicant: Shigenobu Maeda ,  Hyun-pil Noh ,  Choong-ho Lee ,  Seog-heon Ham

Inventor： Shigenobu Maeda ,  Hyun-pil Noh ,  Choong-ho Lee ,  Seog-heon Ham

IPC: H01L21/70 ,  H01L29/66

CPC classification number: H01L21/8236 ,  H01L21/77 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823462 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823857 ,  H01L25/00 ,  H01L27/00 ,  H01L27/0883 ,  H01L29/66545 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Provided are a semiconductor device including a high voltage transistor and a low voltage transistor and a method of manufacturing the same. The semiconductor device includes a semiconductor substrate including a high voltage region and a low voltage region; a high voltage transistor formed in the high voltage region and including a first active region, a first source/drain region, a first gate insulating layer, and a first gate electrode; and a low voltage transistor formed in the low voltage region and including a second active region, a second source/drain region, a second gate insulating layer, and a second gate electrode. The second source/drain region has a smaller thickness than a thickness of the first source/drain region.

Abstract translation: 提供了包括高压晶体管和低压晶体管的半导体器件及其制造方法。 半导体器件包括：包括高电压区域和低电压区域的半导体衬底; 形成在高电压区域中并包括第一有源区，第一源极/漏极区，第一栅极绝缘层和第一栅电极的高压晶体管; 以及形成在所述低电压区域中并包括第二有源区，第二源极/漏极区，第二栅极绝缘层和第二栅电极的低电压晶体管。 第二源极/漏极区域的厚度小于第一源极/漏极区域的厚度。

公开(公告)号：US08379127B2

公开(公告)日：2013-02-19

申请号：US12591039

申请日：2009-11-05

Applicant: Wun-ki Jung ,  Seog-heon Ham ,  Dong-hun Lee ,  Kwi-sung Yoo ,  Min-ho Kwon

Inventor： Wun-ki Jung ,  Seog-heon Ham ,  Dong-hun Lee ,  Kwi-sung Yoo ,  Min-ho Kwon

IPC: H04N3/14 ,  H04N5/335 ,  H01L31/062 ,  H01L31/113

CPC classification number: H04N5/3745 ,  H04N5/3741 ,  H04N5/378

Abstract: Provided are a pixel sensor array and a complementary metal-oxide semiconductor (CMOS) image sensor including the same. The pixel sensor array includes a photoelectric transformation element configured to generate electric charges in response to incident light. A signal transmitting circuit is configured to output the electric charges accumulated in the photoelectric transformation element to a first node based on a first control signal, change an electric potential of the first node to an electric potential of a second signal line based on a second control signal, and output a signal sensed in the first node to a first signal line based on a third control signal. A switch element is configured to connect a supply power terminal to the second signal line based on a fourth control signal. A comparator connected to the first signal line and the second signal line and configured to compare a voltage of the signal and a voltage of a reference signal.

Abstract translation: 提供了一种像素传感器阵列和包括该像素传感器阵列的互补金属氧化物半导体（CMOS）图像传感器。 像素传感器阵列包括被配置为响应于入射光而产生电荷的光电转换元件。 信号发送电路被配置为基于第一控制信号将累积在光电变换元件中的电荷输出到第一节点，基于第二控制将第一节点的电位改变为第二信号线的电位 信号，并且基于第三控制信号将在第一节点中感测的信号输出到第一信号线。 开关元件被配置为基于第四控制信号将电源端子连接到第二信号线。 比较器，连接到第一信号线和第二信号线，并被配置为比较信号的电压和参考信号的电压。

公开(公告)号：US20100110256A1

公开(公告)日：2010-05-06

申请号：US12591039

申请日：2009-11-05

Applicant: Wun-ki Jung ,  Seog-heon Ham ,  Dong-hun Lee ,  Kwi-sung Yoo ,  Min-ho Kwon

Inventor： Wun-ki Jung ,  Seog-heon Ham ,  Dong-hun Lee ,  Kwi-sung Yoo ,  Min-ho Kwon

IPC: H04N5/335

CPC classification number: H04N5/3745 ,  H04N5/3741 ,  H04N5/378

Abstract: Provided are a pixel sensor array and a complementary metal-oxide semiconductor (CMOS) image sensor including the same. The pixel sensor array includes a photoelectric transformation element configured to generate electric charges in response to incident light. A signal transmitting circuit is configured to output the electric charges accumulated in the photoelectric transformation element to a first node based on a first control signal, change an electric potential of the first node to an electric potential of a second signal line based on a second control signal, and output a signal sensed in the first node to a first signal line based on a third control signal. A switch element is configured to connect a supply power terminal to the second signal line based on a fourth control signal. A comparator connected to the first signal line and the second signal line and configured to compare a voltage of the signal and a voltage of a reference signal.

Abstract translation: 提供了一种像素传感器阵列和包括该像素传感器阵列的互补金属氧化物半导体（CMOS）图像传感器。 像素传感器阵列包括被配置为响应于入射光而产生电荷的光电转换元件。 信号发送电路被配置为基于第一控制信号将累积在光电变换元件中的电荷输出到第一节点，基于第二控制将第一节点的电位改变为第二信号线的电位 信号，并且基于第三控制信号将在第一节点中感测的信号输出到第一信号线。 开关元件被配置为基于第四控制信号将电源端子连接到第二信号线。 比较器，连接到第一信号线和第二信号线，并被配置为比较信号的电压和参考信号的电压。