Semiconductor memory device and system capable of executing an interleave programming for a plurality of memory chips and a 2-plane programming at the respective memory chips
    1.
    发明授权
    Semiconductor memory device and system capable of executing an interleave programming for a plurality of memory chips and a 2-plane programming at the respective memory chips 有权
    半导体存储器件和系统能够对各个存储器芯片执行多个存储器芯片的交织编程和2平面编程

    公开(公告)号:US08154925B2

    公开(公告)日:2012-04-10

    申请号:US12697543

    申请日:2010-02-01

    IPC分类号: G11C16/10

    摘要: A semiconductor memory device includes first and second memory chips and a control logic configured to execute an interleave program between the first and second memory chips. The control logic receives write data to be written into first and second memory blocks of the first memory chip. If the first and second memory blocks are normal blocks, the control logic simultaneously performs a program operation for the first and second memory blocks. If one memory block of the first and second memory blocks is a bad block, the control logic writes the received write data corresponding to the one memory block into a storage circuit.

    摘要翻译: 半导体存储器件包括第一和第二存储器芯片以及被配置为在第一和第二存储器芯片之间执行交织程序的控制逻辑。 控制逻辑接收要写入第一存储器芯片的第一和第二存储器块的写入数据。 如果第一和第二存储器块是正常块,则控制逻辑同时对第一和第二存储器块执行编程操作。 如果第一和第二存储器块的一个存储块是坏块,则控制逻辑将接收到的与一个存储器块相对应的写入数据写入存储电路。

    Test method and device for memory device
    2.
    发明授权
    Test method and device for memory device 有权
    存储设备的测试方法和设备

    公开(公告)号:US08289791B2

    公开(公告)日:2012-10-16

    申请号:US12662270

    申请日:2010-04-08

    IPC分类号: G11C29/00

    摘要: Provided is a test method for a memory device including a plurality of storage regions and an SPO recovery unit. The test method stores data in the plurality of storage regions. The test method shuts off supply of power to the memory device and resupplies the power to the memory device. The test method determines an operational state of the SPO recovery unit after the resupplying step based on the stored data.

    摘要翻译: 提供了一种包括多个存储区域和SPO恢复单元的存储器件的测试方法。 测试方法将数据存储在多个存储区域中。 该测试方法会关闭存储设备的电源供应,并重新将存储设备的电源重新供电。 测试方法基于所存储的数据确定在重新供应步骤之后的SPO恢复单元的操作状态。

    Test method and device for memory device
    3.
    发明申请
    Test method and device for memory device 有权
    存储设备的测试方法和设备

    公开(公告)号:US20110032782A1

    公开(公告)日:2011-02-10

    申请号:US12662270

    申请日:2010-04-08

    IPC分类号: G11C29/00 G11C5/14

    摘要: Provided is a test method for a memory device including a plurality of storage regions and an SPO recovery unit. The test method stores data in the plurality of storage regions. The test method shuts off supply of power to the memory device and resupplies the power to the memory device. The test method determines an operational state of the SPO recovery unit after the resupplying step based on the stored data.

    摘要翻译: 提供了一种包括多个存储区域和SPO恢复单元的存储器件的测试方法。 测试方法将数据存储在多个存储区域中。 该测试方法会关闭存储设备的电源供应,并重新将存储设备的电源重新供电。 测试方法基于所存储的数据确定在重新供应步骤之后的SPO恢复单元的操作状态。