公开(公告)号：US07366826B2

公开(公告)日：2008-04-29

申请号：US11192220

申请日：2005-07-27

申请人： Sergey Anatolievich Gorobets ,  Peter John Smith ,  Alan David Bennett

发明人： Sergey Anatolievich Gorobets ,  Peter John Smith ,  Alan David Bennett

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F2212/1032 ,  G06F2212/7203

摘要： Update data to a non-volatile memory may be recorded in at least two interleaving streams such as either into an update block or a scratch pad block depending on a predetermined condition. The scratch pad block is used to buffered update data that are ultimately destined for the update block. Synchronization information about the order recording of updates among the streams is saved with at least one of the streams. This will allow the most recently written version of data that may exist on multiple memory blocks to be identified. In one embodiment, the synchronization information is saved in a first block and is a write pointer that points to the next recording location in a second block. In another embodiment, the synchronization information is a time stamp.

摘要翻译： 根据预定条件，将数据更新到非易失性存储器可以记录在至少两个交织流中，诸如更新块或便笺块块中。 缓冲块块用于缓冲最终发往更新块的更新数据。 与流中的更新的顺序记录的同步信息与至少一个流一起被保存。 这将允许识别可能存在于多个内存块上的最新版本的数据。 在一个实施例中，同步信息被保存在第一块中，并且是指向第二块中的下一个记录位置的写指针。 在另一个实施例中，同步信息是时间戳。

公开(公告)号：US08151035B2

公开(公告)日：2012-04-03

申请号：US12189396

申请日：2008-08-11

申请人： Peter John Smith ,  Sergey Anatolievich Gorobets ,  Alan David Bennett

发明人： Peter John Smith ,  Sergey Anatolievich Gorobets ,  Alan David Bennett

IPC分类号： G06F12/00

CPC分类号： G06F3/064 ,  G06F3/0616 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/7203 ,  G11C16/102

摘要： In a memory that is programmable page by page and each page having multiple sectors that are once-programmable, even if successive writes are sequential, the data recorded to an update block may be fragmented and non-sequential. Instead of recording update data to an update block, the data is being recorded in at least two interleaving streams. When a full page of data is available, it is recorded to the update block. Otherwise, it is temporarily recorded to the scratch pad block until a full page of data becomes available to be transferred to the update block. Preferably, a pipeline operation allows the recording to the update block to be set up as soon as the host write command indicates a full page could be written. If the actual write data is incomplete due to interruptions, the setup will be canceled and recording is made to the scratch pad block instead.

摘要翻译： 在逐页可编程的存储器中，每页具有一次可编程的多个扇区，即使顺序写入是顺序的，记录到更新块的数据可能是分段的和非顺序的。 代替将更新数据记录到更新块，数据被记录在至少两个交错流中。 当全页数据可用时，它被记录到更新块。 否则，它暂时记录到便笺块块中，直到完整页面的数据可用于传送到更新块。 优选地，管道操作允许一旦主机写入命令指示可以写入完整页面就可以对更新块进行记录。 如果实际的写入数据由于中断而不完整，则设置将被取消，而代之以记录。

公开(公告)号：US07913061B2

公开(公告)日：2011-03-22

申请号：US12239351

申请日：2008-09-26

申请人： Sergey Anatolievich Gorobets ,  Peter John Smith ,  Alan David Bennett

发明人： Sergey Anatolievich Gorobets ,  Peter John Smith ,  Alan David Bennett

IPC分类号： G06F12/00

CPC分类号： G06F11/1666 ,  G06F11/1072 ,  G06F11/141 ,  G06F11/1415 ,  G06F11/1658 ,  G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7203 ,  G06F2212/7205 ,  G06F2212/7208 ,  G11C11/5621 ,  G11C11/5628 ,  G11C16/102 ,  G11C16/105 ,  G11C16/20 ,  G11C29/00 ,  G11C29/76 ,  G11C2211/5641

摘要： A non-volatile memory is constituted from a set of memory planes, each having its own set of read/write circuits so that the memory planes can operate in parallel. The memory is further organized into erasable blocks, each for storing a logical group of logical units of data. In updating a logical unit, all versions of a logical unit are maintained in the same plane as the original. Preferably, all versions of a logical unit are aligned within a plane so that they are all serviced by the same set of sensing circuits. In a subsequent garbage collection operation, the latest version of the logical unit need not be retrieved from a different plane or a different set of sensing circuits, otherwise resulting in reduced performance. In one embodiment, any gaps left after alignment are padded by copying latest versions of logical units in sequential order thereto.

摘要翻译： 非易失性存储器由一组存储器平面构成，每个存储器平面具有其自己的一组读/写电路，使得存储器平面可以并行操作。 存储器被进一步组织成可擦除块，每个块用于存储数据的逻辑单元的逻辑组。 在更新逻辑单元时，逻辑单元的所有版本都保持在与原始单元相同的平面中。 优选地，逻辑单元的所有版本在平面内对准，使得它们都由相同的一组感测电路服务。 在随后的垃圾回收操作中，不需要从不同的平面或不同的感测电路组检索最新版本的逻辑单元，否则导致性能降低。 在一个实施例中，通过按照顺序复制最新版本的逻辑单元来填补对齐之后留下的任何间隙。

公开(公告)号：US20090019218A1

公开(公告)日：2009-01-15

申请号：US12239489

申请日：2008-09-26

申请人： Alan Welsh Sinclair ,  Sergey Anatolievich Gorobets ,  Alan David Bennett ,  Peter John Smith

发明人： Alan Welsh Sinclair ,  Sergey Anatolievich Gorobets ,  Alan David Bennett ,  Peter John Smith

IPC分类号： G06F12/02 ,  G06F12/00 ,  G06F12/06

CPC分类号： G06F11/1666 ,  G06F11/1072 ,  G06F11/141 ,  G06F11/1415 ,  G06F11/1658 ,  G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7203 ,  G06F2212/7205 ,  G06F2212/7208 ,  G11C11/5621 ,  G11C11/5628 ,  G11C16/102 ,  G11C16/105 ,  G11C16/20 ,  G11C29/00 ,  G11C29/76 ,  G11C2211/5641

摘要： In a nonvolatile memory with block management system that supports update blocks with non-sequential logical units, an index of the logical units in a non-sequential update block is buffered in RAM and stored periodically into the nonvolatile memory. In one embodiment, the index is stored in a block dedicated for storing indices. In another embodiment, the index is stored in the update block itself. In yet another embodiment, the index is stored in the header of each logical unit. In another aspect, the logical units written after the last index update but before the next have their indexing information stored in the header of each logical unit. In this way, after a power outage, the location of recently written logical units can be determined without having to perform a scanning during initialization. In yet another aspect, a block is managed as partially sequential and partially non-sequential, directed to more than one logical subgroup.

摘要翻译： 在具有支持具有非顺序逻辑单元的更新块的块管理系统的非易失性存储器中，非顺序更新块中的逻辑单元的索引被缓冲在RAM中并被周期性地存储到非易失性存储器中。 在一个实施例中，索引被存储在专用于存储索引的块中。 在另一个实施例中，索引被存储在更新块本身中。 在另一个实施例中，索引被存储在每个逻辑单元的标题中。 在另一方面，在最后一个索引更新之后但在下一个之前写入的逻辑单元将其索引信息存储在每个逻辑单元的标题中。 以这种方式，在断电之后，可以确定最近写入的逻辑单元的位置，而不必在初始化期间执行扫描。 在另一方面，块被部署顺序地且部分地非顺序地管理，定向到多于一个的逻辑子组。

公开(公告)号：US07412560B2

公开(公告)日：2008-08-12

申请号：US11191686

申请日：2005-07-27

申请人： Peter John Smith ,  Sergey Anatolievich Gorobets ,  Alan David Bennett

发明人： Peter John Smith ,  Sergey Anatolievich Gorobets ,  Alan David Bennett

IPC分类号： G06F12/00

CPC分类号： G06F3/064 ,  G06F3/0616 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/7203 ,  G11C16/102

摘要： In a memory that is programmable page by page and each page having multiple sectors that are once-programmable, even if successive writes are sequential, the data recorded to an update block may be fragmented and non-sequential. Instead of recording update data to an update block, the data is being recorded in at least two interleaving streams. When a full page of data is available, it is recorded to the update block. Otherwise, it is temporarily recorded to the scratch pad block until a full page of data becomes available to be transferred to the update block. Preferably, a pipeline operation allows the recording to the update block to be set up as soon as the host write command indicates a full page could be written. If the actual write data is incomplete due to interruptions, the setup will be canceled and recording is made to the scratch pad block instead.

摘要翻译： 在逐页可编程的存储器中，每页具有一次可编程的多个扇区，即使顺序写入是顺序的，记录到更新块的数据可能是分段的和非顺序的。 代替将更新数据记录到更新块，数据被记录在至少两个交错流中。 当全页数据可用时，它被记录到更新块。 否则，它暂时记录到便笺块块中，直到完整页面的数据可用于传送到更新块。 优选地，管道操作允许一旦主机写入命令指示可以写入完整页面就可以对更新块进行记录。 如果实际的写入数据由于中断而不完整，则设置将被取消，而代之以记录。

公开(公告)号：US08103841B2

公开(公告)日：2012-01-24

申请号：US12239489

申请日：2008-09-26

申请人： Alan Welsh Sinclair ,  Sergey Anatolievich Gorobets ,  Alan David Bennett ,  Peter John Smith

发明人： Alan Welsh Sinclair ,  Sergey Anatolievich Gorobets ,  Alan David Bennett ,  Peter John Smith

IPC分类号： G06F12/16

CPC分类号： G06F11/1666 ,  G06F11/1072 ,  G06F11/141 ,  G06F11/1415 ,  G06F11/1658 ,  G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7203 ,  G06F2212/7205 ,  G06F2212/7208 ,  G11C11/5621 ,  G11C11/5628 ,  G11C16/102 ,  G11C16/105 ,  G11C16/20 ,  G11C29/00 ,  G11C29/76 ,  G11C2211/5641

摘要： In a nonvolatile memory with block management system that supports update blocks with non-sequential logical units, an index of the logical units in a non-sequential update block is buffered in RAM and stored periodically into the nonvolatile memory. In one embodiment, the index is stored in a block dedicated for storing indices. In another embodiment, the index is stored in the update block itself. In yet another embodiment, the index is stored in the header of each logical unit. In another aspect, the logical units written after the last index update but before the next have their indexing information stored in the header of each logical unit. In this way, after a power outage, the location of recently written logical units can be determined without having to perform a scanning during initialization. In yet another aspect, a block is managed as partially sequential and partially non-sequential, directed to more than one logical subgroup.

摘要翻译： 在具有支持具有非顺序逻辑单元的更新块的块管理系统的非易失性存储器中，非顺序更新块中的逻辑单元的索引被缓冲在RAM中并被周期性地存储到非易失性存储器中。 在一个实施例中，索引被存储在专用于存储索引的块中。 在另一个实施例中，索引被存储在更新块本身中。 在另一个实施例中，索引被存储在每个逻辑单元的标题中。 在另一方面，在最后一个索引更新之后但在下一个之前写入的逻辑单元将其索引信息存储在每个逻辑单元的标题中。 以这种方式，在断电之后，可以确定最近写入的逻辑单元的位置，而不必在初始化期间执行扫描。 在另一方面，块被部署顺序地且部分地非顺序地管理，定向到多于一个的逻辑子组。

公开(公告)号：US07386655B2

公开(公告)日：2008-06-10

申请号：US11192386

申请日：2005-07-27

申请人： Sergey Anatolievich Gorobets ,  Peter John Smith ,  Alan David Bennett

发明人： Sergey Anatolievich Gorobets ,  Peter John Smith ,  Alan David Bennett

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F2212/7203

摘要： Update data to a non-volatile memory may be recorded in at least two interleaving streams such as either into an update block or a scratch pad block depending on a predetermined condition. The scratch pad block is used to buffered update data that are ultimately destined for the update block. In a preferred embodiment, an index of the data stored in the scratch pad block as well that stored in the update block is saved in an unused portion of the scratch pad block every time the scratch pad block is written to.

摘要翻译： 根据预定条件，将数据更新到非易失性存储器可以记录在至少两个交织流中，诸如更新块或便笺块块中。 缓冲块块用于缓冲最终发往更新块的更新数据。 在优选实施例中，存储在便签区块中的数据的索引以及存储在更新块中的数据被保存在每次写入便笺块块时的便笺本块的未使用部分中。

公开(公告)号：US20090019217A1

公开(公告)日：2009-01-15

申请号：US12239351

申请日：2008-09-26

申请人： Sergey Anatolievich Gorobets ,  Peter John Smith ,  Alan David Bennett

发明人： Sergey Anatolievich Gorobets ,  Peter John Smith ,  Alan David Bennett

IPC分类号： G06F12/02 ,  G06F12/16

CPC分类号： G06F11/1666 ,  G06F11/1072 ,  G06F11/141 ,  G06F11/1415 ,  G06F11/1658 ,  G06F12/0246 ,  G06F2212/7202 ,  G06F2212/7203 ,  G06F2212/7205 ,  G06F2212/7208 ,  G11C11/5621 ,  G11C11/5628 ,  G11C16/102 ,  G11C16/105 ,  G11C16/20 ,  G11C29/00 ,  G11C29/76 ,  G11C2211/5641

摘要： A non-volatile memory is constituted from a set of memory planes, each having its own set of read/write circuits so that the memory planes can operate in parallel. The memory is further organized into erasable blocks, each for storing a logical group of logical units of data. In updating a logical unit, all versions of a logical unit are maintained in the same plane as the original. Preferably, all versions of a logical unit are aligned within a plane so that they are all serviced by the same set of sensing circuits. In a subsequent garbage collection operation, the latest version of the logical unit need not be retrieved from a different plane or a different set of sensing circuits, otherwise resulting in reduced performance. In one embodiment, any gaps left after alignment are padded by copying latest versions of logical units in sequential order thereto.

摘要翻译： 非易失性存储器由一组存储器平面构成，每个存储器平面具有其自己的一组读/写电路，使得存储器平面可以并行操作。 存储器被进一步组织成可擦除块，每个块用于存储数据的逻辑单元的逻辑组。 在更新逻辑单元时，逻辑单元的所有版本都保持在与原始单元相同的平面中。 优选地，逻辑单元的所有版本在平面内对准，使得它们都由相同的一组感测电路服务。 在随后的垃圾回收操作中，不需要从不同的平面或不同的感测电路组检索最新版本的逻辑单元，否则导致性能降低。 在一个实施例中，通过按照顺序复制最新版本的逻辑单元来填补对齐之后留下的任何间隙。

公开(公告)号：US20080301359A1

公开(公告)日：2008-12-04

申请号：US12189396

申请日：2008-08-11

申请人： Peter John Smith ,  Sergey Anatolievich Gorobets ,  Alan David Bennett

发明人： Peter John Smith ,  Sergey Anatolievich Gorobets ,  Alan David Bennett

IPC分类号： G06F12/02

CPC分类号： G06F3/064 ,  G06F3/0616 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/7203 ,  G11C16/102

摘要： In a memory that is programmable page by page and each page having multiple sectors that are once-programmable, even if successive writes are sequential, the data recorded to an update block may be fragmented and non-sequential. Instead of recording update data to an update block, the data is being recorded in at least two interleaving streams. When a full page of data is available, it is recorded to the update block. Otherwise, it is temporarily recorded to the scratch pad block until a full page of data becomes available to be transferred to the update block. Preferably, a pipeline operation allows the recording to the update block to be set up as soon as the host write command indicates a full page could be written. If the actual write data is incomplete due to interruptions, the setup will be canceled and recording is made to the scratch pad block instead.

摘要翻译： 在逐页可编程的存储器中，每页具有一次可编程的多个扇区，即使连续的写入是顺序的，记录到更新块的数据可能是分段的和非顺序的。 代替将更新数据记录到更新块，数据被记录在至少两个交错流中。 当全页数据可用时，它被记录到更新块。 否则，它暂时记录到便笺块块中，直到完整页面的数据可用于传送到更新块。 优选地，管道操作允许一旦主机写入命令指示可以写入完整页面就可以对更新块进行记录。 如果实际的写入数据由于中断而不完整，则设置将被取消，而代之以记录。

公开(公告)号：US20110191530A1

公开(公告)日：2011-08-04

申请号：US13084396

申请日：2011-04-11

申请人： Carlos J. Gonzalez ,  Alan Douglas Bryce ,  Sergey Anatolievich Gorobets ,  Alan David Bennett

发明人： Carlos J. Gonzalez ,  Alan Douglas Bryce ,  Sergey Anatolievich Gorobets ,  Alan David Bennett

IPC分类号： G06F12/00

CPC分类号： G11C29/76 ,  G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7208 ,  G11C29/808

摘要： The present invention presents techniques for the linking of physical blocks of a non-volatile memory into composite logical structures or “metablocks”. After determining an initial linking of good physical blocks into metablocks, a record of the linking is maintained in the non-volatile memory where it can be readily accessed when needed. In one set of embodiments, the initially linking is deterministically formed according to an algorithm and can be optimized according to the pattern of any bad blocks in the memory. As additional bad blocks arise, the linking is updated using by replacing the bad blocks in a linking with good blocks, preferably in the same sub-array of the memory as the block that they are replacing.

摘要翻译： 本发明提出了用于将非易失性存储器的物理块链接到复合逻辑结构或“元区块”中的技术。 在确定好的物理块到元区块的初始链接之后，在非易失性存储器中维护链接的记录，在需要时可以容易地访问。 在一组实施例中，根据算法确定性地形成初始链接，并且可以根据存储器中的任何坏块的模式进行优化。 随着额外的坏块出现，链接被更新，通过替换与优质块链接的坏块，优选地与它们所替换的块相同的存储器子阵列来更新。