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公开(公告)号:US20120058609A1
公开(公告)日:2012-03-08
申请号:US13223783
申请日:2011-09-01
申请人: Seung-Hun LEE , Byeong-Chan Lee , Sang-Bom Kang
发明人: Seung-Hun LEE , Byeong-Chan Lee , Sang-Bom Kang
IPC分类号: H01L21/8238 , H01L21/20
CPC分类号: H01L27/0922 , H01L21/02532 , H01L21/02573 , H01L21/0262 , H01L21/02636 , H01L21/823807 , H01L21/823814 , H01L21/823864 , H01L27/0629 , H01L29/0847 , H01L29/1608 , H01L29/161 , H01L29/165 , H01L29/7843
摘要: A method of manufacturing a semiconductor device includes forming first and second gate structures on a substrate in first and second regions, respectively, forming a first capping layer on the substrate by a first high density plasma process, such that the first capping layer covers the first and second gate structures except for sidewalls thereof, removing a portion of the first capping layer in the first region, removing an upper portion of the substrate in the first region using the first gate structure as an etching mask to form a first trench, and forming a first epitaxial layer to fill the first trench.
摘要翻译: 一种制造半导体器件的方法包括分别在第一和第二区域的衬底上形成第一和第二栅极结构,通过第一高密度等离子体工艺在衬底上形成第一覆盖层,使得第一覆盖层覆盖第一 以及除了其侧壁之外的第二栅极结构,去除第一区域中的第一覆盖层的一部分,使用第一栅极结构去除第一区域中的衬底的上部,以形成第一沟槽,并形成 第一外延层,以填充第一沟槽。
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公开(公告)号:US20140361313A1
公开(公告)日:2014-12-11
申请号:US14466078
申请日:2014-08-22
申请人: Seung-Hun LEE , Byeong-Chan LEE , Sang-Bom KANG
发明人: Seung-Hun LEE , Byeong-Chan LEE , Sang-Bom KANG
IPC分类号: H01L27/092 , H01L29/165 , H01L27/06 , H01L29/08 , H01L29/16 , H01L29/161
CPC分类号: H01L27/0922 , H01L21/02532 , H01L21/02573 , H01L21/0262 , H01L21/02636 , H01L21/823807 , H01L21/823814 , H01L21/823864 , H01L27/0629 , H01L29/0847 , H01L29/1608 , H01L29/161 , H01L29/165 , H01L29/7843
摘要: A method of manufacturing a semiconductor device includes forming first and second gate structures on a substrate in first and second regions, respectively, forming a first capping layer on the substrate by a first high density plasma process, such that the first capping layer covers the first and second gate structures except for sidewalls thereof, removing a portion of the first capping layer in the first region, removing an upper portion of the substrate in the first region using the first gate structure as an etching mask to form a first trench, and forming a first epitaxial layer to fill the first trench.
摘要翻译: 一种制造半导体器件的方法包括分别在第一和第二区域的衬底上形成第一和第二栅极结构,通过第一高密度等离子体工艺在衬底上形成第一覆盖层,使得第一覆盖层覆盖第一 以及除了其侧壁之外的第二栅极结构,去除第一区域中的第一覆盖层的一部分,使用第一栅极结构去除第一区域中的衬底的上部,以形成第一沟槽,并形成 第一外延层,以填充第一沟槽。
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