Digital-to-analog converter and generation of high-bandwidth analog signals

    公开(公告)号:US10374623B1

    公开(公告)日:2019-08-06

    申请号:US16004673

    申请日:2018-06-11

    IPC分类号: H04B10/532 H03M1/08 H04Q11/00

    摘要: A controlled switch having N inputs and a single output (N≥2) is switchable between N states. In each state a respective one of the inputs is connected to the single output. There are N sources of sub-streams of analog samples, each sub-stream composed of pairs of adjacent analog samples. Each source is coupled to a respective one of the inputs. In operation, the controlled switch is controlled by a control signal to switch between the N states. While the controlled switch is in any one of the states, a data transition occurs between two adjacent analog samples in the sub-stream whose source is coupled to the input that is connected to the single output. The single output yields the high-bandwidth analog signal. Any pair of adjacent analog samples in any one of the sub-streams substantially determines a corresponding pair of adjacent analog samples in the high-bandwidth analog signal.

    Forward error correction with compression coding

    公开(公告)号:US11201695B2

    公开(公告)日:2021-12-14

    申请号:US17226287

    申请日:2021-04-09

    摘要: A method performed at an electronic device comprises receiving information bits, a first nub, and a second nub, each nub comprising redundant values; calculating first calculated determiners from first subsets of the information bits along a first dimension; calculating first corrected determiners by applying first FEC decoding to a combination of the first calculated determiners and the first nub; correcting at least one error in the information bits using a difference between the first corrected determiners and the first calculated determiners; calculating second calculated determiners from second subsets of the information bits along a second dimension that differs from the first dimension; calculating second corrected determiners by applying second FEC decoding to a combination of the second calculated determiners and the second nub; and correcting at least one additional error in the information bits using a difference between the second corrected determiners and the second calculated determiners.

    Clock phase detection using interior spectral components

    公开(公告)号:US11126219B2

    公开(公告)日:2021-09-21

    申请号:US16599678

    申请日:2019-10-11

    摘要: A receiver apparatus comprises circuitry configured for storing a first sequence of values. At the receiver apparatus, a communications signal is received which conveys a second sequence of values, the second sequence of values being related to the first sequence of values. According to some examples, the second sequence of values is identical to the first sequence of values. At the receiver apparatus, P results are calculated from a cross-correlation of the first sequence of values with at least a portion of a representation of the communications signal, where P is a positive integer. According to some examples, P≥2. An estimate of a phase offset of a continuous clock is calculated as a function of the P results. According to some examples, the function is a non-linear function. The estimate of the clock phase offset may be used to achieve clock recovery at the receiver apparatus.

    Nonlinear digital signal processing for additive noise removal

    公开(公告)号:US11038599B1

    公开(公告)日:2021-06-15

    申请号:US17064910

    申请日:2020-10-07

    摘要: A receiver applies first processing to a digital representation of a received signal to generate a first processed signal having first additive noise and first linear inter-symbol interference (ISI), the first processing comprising a substantially linear operation designed to substantially minimize a sum of variances of the first additive noise and the first linear ISI. The receiver applies second processing to the first processed signal to generate a second processed signal having second additive noise and second linear ISI, the second processing comprising a substantially nonlinear operation designed (i) to make a variance of the second additive noise substantially lower than the variance of the first additive noise, and (ii) to make a sum of the variance of the second additive noise and a variance of the second linear ISI substantially lower than the sum of the variances of the first additive noise and first linear ISI.

    Optical modulation schemes having reduced nonlinear optical transmission impairments
    6.
    发明授权
    Optical modulation schemes having reduced nonlinear optical transmission impairments 有权
    具有降低的非线性光传输损伤的光调制方案

    公开(公告)号:US09143238B2

    公开(公告)日:2015-09-22

    申请号:US13969694

    申请日:2013-08-19

    CPC分类号: H04B10/532 H04B10/516

    摘要: A method of transmitting a data signal using an optical transmitter of an optical communications system. The optical transmitter is configured to modulate an optical carrier in successive signalling intervals to generate an optical signal. A modulation scheme is provided which comprises a multi-dimensional symbol constellation. The modulation scheme is designed such that an average degree of polarization of a modulated optical signal output from the optical transmitter has a first value when averaged across a first signaling interval, and has a second value when averaged across more than one and fewer than 100 signaling intervals. The second value is less than 10 percent of the first value. During run-time, an encoder of the optical transmitter encoding a data signal to be transmitted as symbols of the constellation, and a modulator of the optical transmitter modulating available dimensions of the optical carrier in accordance with the symbols.

    摘要翻译: 一种使用光通信系统的光发射机发送数据信号的方法。 光发射机被配置为在连续的信令间隔中调制光载波以产生光信号。 提供了一种包括多维符号星座的调制方案。 调制方案被设计成使得当从第一信令间隔平均时,从光发送器输出的调制光信号的平均偏振度具有第一值,并且当平均多于一个且少于100个信令时具有第二值 间隔 第二个值小于第一个值的10%。 在运行时间期间,光发送器的编码器编码要作为星座符号发送的数据信号,以及根据符号调制光载波的可用尺寸的光发射机的调制器。

    Chain encoding and decoding of high speed signals
    7.
    发明授权
    Chain encoding and decoding of high speed signals 有权
    链式编码和解码高速信号

    公开(公告)号:US09088387B2

    公开(公告)日:2015-07-21

    申请号:US13949627

    申请日:2013-07-24

    摘要: A method of recovering a value of a symbol received through an optical communications system. A multi-bit estimate of the symbol is subdivided into a first part and a second part, each part including at least one respective bit of the estimate. A most likely value of the first part is detected. The most likely value of the first part is processed using a Forward Error Correction (FEC) decoder to generate a corrected first part value, which is used to detect a most likely value of the second part. The most likely value of the second part is then processed by the FEC decoder to generate a corrected second part, which is combined with the corrected first part to recover the value of the symbol.

    摘要翻译: 一种恢复通过光通信系统接收的符号的值的方法。 符号的多位估计被细分为第一部分和第二部分,每个部分包括估计的至少一个相应位。 检测到第一部分的最有可能的值。 使用前向纠错(FEC)解码器处理第一部分的最可能的值,以产生校正的第一部分值,其用于检测第二部分的最可能的值。 然后由FEC解码器处理第二部分的最可能的值,以产生校正的第二部分,其与校正的第一部分组合以恢复符号的值。

    Communications with conditional chain decoding

    公开(公告)号:US10484131B2

    公开(公告)日:2019-11-19

    申请号:US15841988

    申请日:2017-12-14

    IPC分类号: H04L1/00 H04L27/36 H04L27/00

    摘要: Client data bits, including first client data bits and second client data bits, are communicated from a transmitter to a receiver. At the transmitter, the first client data bits are processed to generate processed values, where each processed value is more likely to be a first element than a second element. Forward Error Correction ‘FEC’ encoding is applied to the second client data bits to generate FEC-encoded values. Symbols are created by mapping the FEC-encoded values to first positions in the symbols and by mapping the processed values to second positions in the symbols. The symbols are modulated onto a communications channel using a modulation scheme with a code that assigns a lower average energy to symbols containing the first elements in the second positions than to symbols containing the second elements in the second positions. At the receiver, client data bits are decoded using conditional chain decoding.