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    PHASE SHIFTER AND MANUFACTURING METHOD THEREOF, ANTENNA AND MANUFACTURING METHOD THEREOF
    1.
    发明申请
    PHASE SHIFTER AND MANUFACTURING METHOD THEREOF, ANTENNA AND MANUFACTURING METHOD THEREOF 有权

    公开(公告)号：US20210408680A1

    公开(公告)日：2021-12-30

    申请号：US16999781

    申请日：2020-08-21

    Applicant: Shanghai Tianma Micro-Electronics Co., Ltd.

    Inventor： Kerui XI ,  Xuhui PENG ,  Feng QIN ,  Tingting CUI ,  Zhenyu JIA ,  Ping SU ,  Yuantao WU

    IPC: H01Q3/36 ,  H01Q3/26

    Abstract: A phase shifter and a manufacturing method thereof and an antenna and a manufacturing method thereof are provided. The phase shifter includes: first and second substrates opposite to each other; a first electrode provided on the first substrate and configured to receive a ground signal; a second electrode provided on a side of the second substrate facing towards the first substrate; liquid crystals encapsulated between the first substrate and the second substrate and driven by the first electrode and the second electrode to rotate; and a support structure provided between the first substrate and the second substrate and including a first spacer. The first spacer is located on a side of the second electrode facing away from the second substrate, and an orthographic projection of the first spacer on the second substrate is within an orthographic projection of the second electrode on the second substrate.

    SEMICONDUCTOR PACKAGE AND FORMATION METHOD THEREOF
    2.
    发明申请
    SEMICONDUCTOR PACKAGE AND FORMATION METHOD THEREOF 有权

    公开(公告)号：US20230137800A1

    公开(公告)日：2023-05-04

    申请号：US18090918

    申请日：2022-12-29

    Applicant: Shanghai Tianma Micro-Electronics Co., Ltd. ,  Shanghai AVIC OPTO Electronics Co.,Ltd.

    Inventor： Xuhui PENG ,  Kerui XI ,  Tingting CUI ,  Feng QIN ,  Jie ZHANG

    IPC: H01L21/48 ,  H01L21/56 ,  H01L23/498 ,  H01L23/00

    Abstract: A semiconductor package includes a semiconductor element, a wiring structure, an encapsulation structure, and a solder ball. The semiconductor element includes a plurality of pins. A side of the wiring structure is electrically connected to the plurality of pins of the semiconductor element. The wiring structure includes at least two first wiring layers. A first insulating layer is disposed between adjacent two first wiring layers of the at least two first wiring layers. The first insulating layer includes a plurality of first through-holes. The adjacent two first wiring layers are electrically connected to each other through the plurality of first through-holes. The encapsulation structure at least partially surrounds the semiconductor element. The solder ball is located on a side of the wiring structure away from the semiconductor element. The solder ball is electrically connected to the at least two first wiring layers.

    PHASE SHIFTER, FABRICATION METHOD THEREOF, AND ANTENNA
    5.
    发明申请
    PHASE SHIFTER, FABRICATION METHOD THEREOF, AND ANTENNA 有权

    公开(公告)号：US20220320731A1

    公开(公告)日：2022-10-06

    申请号：US17425572

    申请日：2020-08-24

    Applicant: Shanghai Tianma Micro-Electronics Co., Ltd. ,  Chengdu Tianma Micro-Electronics Co., Ltd.

    Inventor： Kerui XI ,  Xuhui PENG ,  Feng QIN ,  Tingting CUI ,  Qinyi DUAN ,  Qiongqin MAO

    IPC: H01Q3/36

    Abstract: A phase shifter, a fabrication method thereof, and an antenna are provided. The phase shifter includes a first substrate, a second substrate, a ground electrode disposed on a side of the first substrate facing towards the second substrate, a transmission electrode disposed on a side of the second substrate facing towards the first substrate, and liquid crystals filled between the first substrate and the second substrate. In a direction perpendicular to a plane of the second substrate, the transmission electrode overlaps with the ground electrode. The ground electrode is provided with a detection hollow part, and in the direction perpendicular to the plane of the second substrate, at least a part of the detection hollow part does not overlap with the transmission electrode.

    SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SEMICONDUCTOR PACKAGE
    6.
    发明申请
    SEMICONDUCTOR PACKAGE AND METHOD FOR FABRICATING THE SEMICONDUCTOR PACKAGE 有权

    公开(公告)号：US20220293544A1

    公开(公告)日：2022-09-15

    申请号：US17829619

    申请日：2022-06-01

    Applicant: Shanghai Tianma Micro-Electronics Co., Ltd. ,  Shanghai AVIC OPTO Electronics Co., Ltd.

    Inventor： Feng QIN ,  Kerui XI ,  Tingting CUI ,  Jie ZHANG ,  Xuhui PENG

    IPC: H01L23/00 ,  H01L21/56 ,  H01L23/31

    Abstract: Provided are a semiconductor package and a method for fabricating the semiconductor package. The method includes the followings steps: a first workpiece is provided, where the first workpiece includes a first substrate and multiple first rewiring structures arranged on the first substrate at intervals, and each first rewiring structure includes at least two first rewiring layers; an encapsulation layer is formed on the first rewiring structures, where the encapsulation layer is provided with multiple first through holes, and the first through holes expose one first rewiring layer; at least two second rewiring layers are disposed on a side of the encapsulation layer facing away from the first rewiring layer; multiple semiconductor elements are provided, where the semiconductor elements are arranged on a side of the first rewiring structures facing away from the encapsulation layer, where the first rewiring layers are electrically connected to pins of the semiconductor elements.

    SEMICONDUCTOR PACKAGE AND FORMATION METHOD THEREOF
    8.
    发明申请
    SEMICONDUCTOR PACKAGE AND FORMATION METHOD THEREOF 有权

    公开(公告)号：US20210351042A1

    公开(公告)日：2021-11-11

    申请号：US16913020

    申请日：2020-06-26

    Applicant: Shanghai Tianma Micro-Electronics Co., Ltd. ,  Shanghai AVIC OPTO Electronics Co.,Ltd.

    Inventor： Xuhui PENG ,  Kerui XI ,  Tingting CUI ,  Feng QIN ,  Jie ZHANG

    IPC: H01L21/48 ,  H01L23/498 ,  H01L23/00 ,  H01L21/56

    Abstract: A semiconductor package and a method of forming the semiconductor package are provided. The method includes providing a first substrate, forming a wiring structure containing at least two first wiring layers, disposing a first insulating layer between adjacent two first wiring layers, and patterning the first insulating layer to form a plurality of first through-holes. The adjacent two first wiring layers are electrically connected to each other through the plurality of first through-holes. The method also includes providing at least one semiconductor element each including a plurality of pins. In addition, the method includes disposing the plurality of pins of the each semiconductor element on a side of the wiring structure away from the first substrate. Further, the method includes encapsulating the at least one semiconductor element, and placing a ball on a side of the wiring structure away from the at least one semiconductor element.

    PACKAGE STRUCTURE, PACKAGING METHOD, CAMERA MODULE, AND ELECTRONIC EQUIPMENT
    10.
    发明申请
    PACKAGE STRUCTURE, PACKAGING METHOD, CAMERA MODULE, AND ELECTRONIC EQUIPMENT 有权

    公开(公告)号：US20220102406A1

    公开(公告)日：2022-03-31

    申请号：US17546740

    申请日：2021-12-09

    Applicant: Shanghai AVIC OPTO Electronics Co., Ltd. ,  Shanghai Tianma Micro-Electronics Co., Ltd.

    Inventor： Kerui XI ,  Xuhui PENG ,  Feng QIN ,  Tingting CUI ,  Zhenyu JIA

    IPC: H01L27/146 ,  H01L25/16

    Abstract: The present disclosure provides chip package structure, packaging method, camera module and electronic equipment. The package structure includes chip package module, which includes light-transmitting substrate, wiring layer located on side of light-transmitting substrate and including first metal wire, conductor located on side of wiring layer facing away from light-transmitting substrate, photosensitive chip located on side of wiring layer facing away from the light-transmitting substrate, active chip located on side of wiring layer facing away from light-transmitting substrate, and plastic encapsulation layer encapsulating photosensitive chip and active chip. The conductor includes first end electrically connected to first metal wire, and second end. The photosensitive chip includes pin electrically connected to first metal wire and has photosensitive surface facing towards light-transmitting substrate. The photosensitive surface includes photosensitive region that is not overlapping first metal wire. The active chip includes pin electrically connected to first metal wire.

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