Abstract:
The invention provides a technique inhibiting luminance unevenness among pixels. An active matrix substrate has a plurality of pixel electrodes PXB each connected to a corresponding one of gate lines 13 and a corresponding one of source lines 15. The active matrix substrate includes a common electrode 14 facing each of the pixel electrodes PXB, and an auxiliary line 17 connected to the common electrode 14. The active matrix substrate further includes a plurality of drive circuits disposed in part of a display region and each configured to drive a corresponding one of the gate lines 13. The drive circuits are each connected to a control line provided for supply of a drive signal. The drive signal has first potential and second potential lower than the first potential alternately at constant cycles. The control line has a line portion 161 extending substantially in parallel with the gate lines 13. Between the line portion 161 and a capacitance forming region r where each of the pixel electrodes PXB connected to gate lines 13(n) and 13(n+2) switched into an unselected state during potential decrease of the line portion 161 forms capacitance between the pixel electrode PXB and the common electrode 14, the auxiliary line 17 is connected with the common electrode 14.
Abstract:
Provided is an active matrix substrate having a narrower frame region, the active matrix substrate having a display region in which a plurality of pixel regions that have pixel groups independent from one another, respectively, are arrayed along the gate lines. An active matrix substrate 20a has a display region 200 in which a pixel region 201A and a pixel region 201B that include gate lines and source lines, respectively, are arrayed along a direction in which the gate lines extend. In the pixel region 201A and the pixel region 201B, gate drivers 11 for driving gate lines 13 in the pixel regions are provided. In a frame region R1, a terminal part 12s for supplying data signals to the data lines are provided. One-side ends of data lines 15a in the pixel region 201A are routed from the terminal part 12s, and the data lines 15b in the pixel region 201A are connected with the data lines 15a in the pixel region 201A.
Abstract:
Provided is an active matrix substrate that includes gate lines (13G), source lines, pixel switching elements, a plurality of gate line driving circuits (11) that control potentials of the gate lines, in the display region, and control signal lines (15L1) that supply a control signal to the gate line driving circuits (11). Each of the gate line driving circuits (11) includes driving switching elements and a capacitor. At least part of the driving switching elements and the capacitor are arranged at positions closer to, not the gate line (13G) corresponding to the gate line driving circuit (11), but another gate line (13G).
Abstract:
Provided is an active matrix substrate that includes a gate line group, a source line group, a pixel electrode arranged in a display area, and a gate line driving circuit (11) formed in the display area. The gate line driving circuit (11) includes an accumulation line that accumulates a voltage for controlling the voltage level of the gate line; an output unit (U1) that controls the voltage level of the gate line according to the voltage of the accumulation line; an accumulated voltage supply unit (U2) that varies the voltage of the accumulation line according to a signal input from another gate line; and accumulated voltage adjustment units (U3) that change the voltage of the accumulation line to a predetermined level according to the control signal. The output unit (U1), the accumulated voltage supply unit (U2), and, the accumulated voltage adjustment units (U3) are arrayed along the gate line, and the output unit (U1) is arranged at a position interposed between the accumulated voltage adjustment units (U3).
Abstract:
A technique is provided that reduces dullness of a potential provided to a line such as gate line on an active-matrix substrate to enable driving the line at high speed and, at the same time, reduces the size of the picture frame region. On an active-matrix substrate (20a) are provided gate lines (13G) and source lines. On the active-matrix substrate (20a) are further provided: gate drivers (11) each including a plurality of switching elements, at least one of which is located in a pixel region, for supplying a scan signal to a gate line (13G); and lines (15L1) each for supplying a control signal to the associated gate driver (11). A control signal is supplied by a display control circuit (4) located outside the display region to the gate drivers (11) via the lines (15L1). In response to a control signal supplied, each gate driver (11) drives the gate line (13G) to which it is connected.
Abstract:
Provided is a technique for decreasing the deterioration of the display quality, while reducing electric power consumption. An active matrix substrate includes a plurality of gate lines Gn, Gn+1, a plurality of source lines S, a plurality of pixels PIX that are provided with pixel electrodes 11, respectively, and pixel switching elements 12 each of which is connected with the pixel electrode 11, the gate line, and the source line. The pixel electrode 11 has a connection portion 11b to which the pixel switching element 12 is connected. The connection portion 11b extends to an adjacent one of the pixels that is adjacent to the pixel where the pixel electrode 11 is provided, in a gate line extending direction. A data signal supplied by a source line has a polarity that is opposite to a polarity of a data signal supplied by an source line adjacent to the source line, and that is inverted every vertical period.
Abstract:
Provided is a sensor-equipped display device (1) that includes: a first substrate (20a); a second substrate (20b) opposed to the first substrate (20a); a liquid crystal layer (LC); a plurality of first lines (15) extending in a first direction in a pixel area (AA); second lines extending in a second direction that is different from the first direction; pixel switching elements that are provided for pixels, respectively, and are connected to the first lines and the second lines; a plurality of sensor electrodes (SE, DL) provided at positions that overlap the pixel area on at least one of the first substrate and the second substrate, for detecting the contact or approach of the object; and a plurality of sensor lead-out lines that are provided in parallel to the first lines or the second lines in the pixel area on the first substrate, and are connected to the sensor electrodes, respectively.
Abstract:
To reduce the parasitic capacitance of a driving circuit and definitely switches a gate line to a selection state, an active matrix substrate is provided. The active matrix substrate includes a driving circuit that switches a gate line (13G) to a selection state in a pixel region defined by a source line (15S) and the gate line (13G). The driving circuit includes: a plurality of switching elements including an output switching element (TFT-F) that supplies a selection voltage to the gate line; and an internal line (netA) to which a gate terminal of the output switching element (TFT-F) and at least a first switching element of the switching elements other than the output switching element are connected. The active matrix substrate includes a reduction part (C1 and C2) that reduce the parasitic capacitance of the driving circuit in the pixel region in which at least one of the internal line and the first switching element is located.
Abstract:
A technique of, in the case of changing, at predetermined time intervals, a drive circuit for switching a gate line to a selected state, preventing a stopped drive circuit from malfunctioning is provided. Each of a plurality of drive circuits provided for each gate line in an active-matrix substrate includes: a selection circuit unit including an output switching element that is turned on to apply a voltage to the gate line in response to a control signal; an internal line connected to a gate terminal of the output switching element and the gate line; and a potential control circuit unit connected to the internal line for controlling a potential of the internal line in response to the control signal. At predetermined time intervals, a signal supply unit: supplies, to at least one of the plurality of drive circuits, a potential control signal so that the potential of the internal line is controlled to be lower than a threshold voltage of the output switching element by the potential control circuit unit; and supplies, to each of the other drive circuits, a drive signal so that a selection voltage is applied to the gate line by the selection circuit unit.
Abstract:
A technique is provided that reduces dullness of a potential provided to a line such as gate line on an active-matrix substrate to enable driving the line at high speed and, at the same time, reduces the size of the picture frame region. On an active-matrix substrate (20a) are provided gate lines (13G) and source lines. On the active-matrix substrate (20a) are further provided: gate drivers (11) each including a plurality of switching elements, at least one of which is located in a pixel region, for supplying a scan signal to a gate line (13G); and lines (15L1) each for supplying a control signal to the associated gate driver (11). A control signal is supplied by a display control circuit (4) located outside the display region to the gate drivers (11) via the lines (15L1). In response to a control signal supplied, each gate driver (11) drives the gate line (13G) to which it is connected.