公开(公告)号：US06756818B1

公开(公告)日：2004-06-29

申请号：US10250171

申请日：2003-06-10

Applicant: Shen-Iuan Liu ,  Chih-Hao Sun ,  Hsiang-Hui Chang

Inventor： Shen-Iuan Liu ,  Chih-Hao Sun ,  Hsiang-Hui Chang

IPC: H03L706

CPC classification number: H03K5/133 ,  H03K5/1504 ,  H03K2005/00032 ,  H03K2005/00208 ,  H03L7/0812 ,  H03L7/0891

Abstract: A voltage controlled delay line having a plurality of delay cells is used to delay a first reference clock by a predetermined delay time to generate an in-phase first delay clock and to delay a second reference clock by the predetermined delay time to generate an in-phase second delay clock. Each delay cell has a first input port, a second input port, a first output port, and a second output port. The first output port of one delay cell and the second input port of another one delay cell having the same phase are electrically connected or the second output port of one delay cell and the first input port of another one delay cell having the same phase are electrically connected so that the first and second input port of each delay cell are not connected to the first and second output port of an adjacent delay cell.

Abstract translation: 具有多个延迟单元的电压控制延迟线用于将第一参考时钟延迟预定延迟时间以产生同相第一延迟时钟并将第二参考时钟延迟预定延迟时间， 相位延迟时钟。 每个延迟单元具有第一输入端口，第二输入端口，第一输出端口和第二输出端口。 一个延迟单元的第一输出端口和具有相同相位的另一个延迟单元的第二输入端口电连接或一个延迟单元的第二输出端口和具有相同相位的另一个延迟单元的第一输入端口是电气 连接，使得每个延迟单元的第一和第二输入端口不连接到相邻延迟单元的第一和第二输出端口。

公开(公告)号：US20130142274A1

公开(公告)日：2013-06-06

申请号：US13610912

申请日：2012-09-12

Applicant: Hsiang-Hui Chang ,  Augusto Marques ,  Li-Shin Lai ,  Chih-Hao Sun ,  George Chien

Inventor： Hsiang-Hui Chang ,  Augusto Marques ,  Li-Shin Lai ,  Chih-Hao Sun ,  George Chien

IPC: H04L25/02

CPC classification number: H04L25/02 ,  H04L27/0002

Abstract: An embodiment of the invention provides a sliced transmitter front-end (TX FE). The sliced TX FE includes first TX FE slices and a second TX FE slice that are connected in parallel. As a whole the first TX FE slices contributes a high-gain section to a superimposed gain range of the sliced TX FE. The second TX FE slice has a gain range that constitutes a low-gain section of the superimposed gain range of the sliced TX FE. A minimum gain of the gain range of the second TX FE slice is smaller than a minimum gain of the high-gain section.

Abstract translation: 本发明的实施例提供了一个切片发射机前端（TX FE）。 分片TX FE包括并行连接的第一TX FE片和第二TX FE片。 作为整体，第一TX FE片对切片TX FE的叠加增益范围贡献高增益部分。 第二TX FE切片具有构成切片TX FE的叠加增益范围的低增益部分的增益范围。 第二TX FE片的增益范围的最小增益小于高增益部分的最小增益。

公开(公告)号：US09065691B2

公开(公告)日：2015-06-23

申请号：US13610912

申请日：2012-09-12

Applicant: Hsiang-Hui Chang ,  Augusto Marques ,  Li-Shin Lai ,  Chih-Hao Sun ,  George Chien

Inventor： Hsiang-Hui Chang ,  Augusto Marques ,  Li-Shin Lai ,  Chih-Hao Sun ,  George Chien

IPC: H04L25/02 ,  H04L27/00

CPC classification number: H04L25/02 ,  H04L27/0002

Abstract: An embodiment of the invention provides a sliced transmitter front-end (TX FE). The sliced TX FE includes first TX FE slices and a second TX FE slice that are connected in parallel. As a whole the first TX FE slices contributes a high-gain section to a superimposed gain range of the sliced TX FE. The second TX FE slice has a gain range that constitutes a low-gain section of the superimposed gain range of the sliced TX FE. A minimum gain of the gain range of the second TX FE slice is smaller than a minimum gain of the high-gain section.

Abstract translation: 本发明的实施例提供了一个切片发射机前端（TX FE）。 分片TX FE包括并行连接的第一TX FE片和第二TX FE片。 作为整体，第一TX FE片对切片TX FE的叠加增益范围贡献高增益部分。 第二TX FE切片具有构成切片TX FE的叠加增益范围的低增益部分的增益范围。 第二TX FE片的增益范围的最小增益小于高增益部分的最小增益。

公开(公告)号：US08718576B2

公开(公告)日：2014-05-06

申请号：US12703775

申请日：2010-02-11

Applicant: Chih-Hao Sun

Inventor： Chih-Hao Sun

IPC: H04B1/04 ,  H03C1/62

CPC classification number: H04B1/0475

Abstract: A radio frequency (RF) modulator includes: converting means for up-converting a first and second baseband signals into a first and second up-converted signals with a reference clock, wherein a phase difference between the first and second baseband signals substantially equals 180°/N; and combining means for combining the first and second up-converted signals to generate an output signal.

Abstract translation: 射频（RF）调制器包括：用于将第一和第二基带信号上变频为具有参考时钟的第一和第二上变频信号的转换装置，其中第一和第二基带信号之间的相位差基本上等于180° / N; 以及组合装置，用于组合第一和第二上变频信号以产生输出信号。

公开(公告)号：US08610737B2

公开(公告)日：2013-12-17

申请号：US12788567

申请日：2010-05-27

Applicant: Shao-Yi Chien ,  Chih-Hao Sun ,  You-Ming Tsao ,  Ka-Hang Lok

Inventor： Shao-Yi Chien ,  Chih-Hao Sun ,  You-Ming Tsao ,  Ka-Hang Lok

IPC: G06T15/50

CPC classification number: G06T15/04 ,  G06T2200/28

Abstract: A graphic processing unit (GPU) with a configurable filtering module (CFU) and an operation method thereof are presented. The graphic processing unit comprises a memory module and a configurable filtering module. The memory module stores at least one texture image. The configurable filtering module, connected to the memory module, comprises a plurality of filter equations, from which a filter equation is selected. A plurality of pixel points are sampled from the texture image. Each sampled pixel point is set with a weight value respectively. Each sampled pixel point with a weight value corresponding thereto is substituted into the selected filter equation to perform an operational process to acquire an operated value. Thereby, the user can decide the operation method of the GPU by selecting an appropriate filter equation and setting adjustable parameters in the filter equation.

Abstract translation: 提出了具有可配置过滤模块（CFU）的图形处理单元（GPU）及其操作方法。 图形处理单元包括存储器模块和可配置的过滤模块。 存储器模块存储至少一个纹理图像。 连接到存储器模块的可配置过滤模块包括多个滤波器方程，从中选择滤波器方程。 从纹理图像中采样多个像素点。 每个采样像素点分别设置一个权重值。 具有与其对应的权重值的每个采样像素点被替换为所选择的滤波器方程式，以执行获取操作值的操作处理。 由此，用户可以通过选择适当的滤波方程并设置滤波方程中的可调参数来决定GPU的运算方法。

公开(公告)号：US20130016796A1

公开(公告)日：2013-01-17

申请号：US13182444

申请日：2011-07-14

Applicant: Chih-Hao Sun ,  Chi-Yao Yu

Inventor： Chih-Hao Sun ,  Chi-Yao Yu

IPC: H04L27/36 ,  H03C3/02

CPC classification number: H04L27/361 ,  H04L27/2075

Abstract: A signal modulator includes: a modulating circuit; a first signal trace block arranged to conduct a first in-phase oscillating signal to the modulating circuit, and conduct a first quadrature-phase oscillating signal to the modulating circuit; and a second signal trace block arranged to conduct a second in-phase oscillating signal to the modulating circuit, and conduct a second quadrature-phase oscillating signal to the modulating circuit, and a phase difference caused by the first signal trace block substantially equals a phase difference caused by the second signal trace block.

Abstract translation: 信号调制器包括：调制电路; 第一信号轨迹块，布置成将第一同相振荡信号传导到调制电路，并且向调制电路传导第一正交振荡信号; 以及第二信号轨迹块，被布置成将第二同相振荡信号传导到调制电路，并且向调制电路传导第二正交振荡信号，并且由第一信号轨迹块引起的相位差基本上等于相位 由第二信号跟踪块引起的差异。

公开(公告)号：US20110193606A1

公开(公告)日：2011-08-11

申请号：US12703775

申请日：2010-02-11

Applicant: Chih-Hao Sun

Inventor： Chih-Hao Sun

IPC: H03K5/13 ,  G06G7/14

CPC classification number: H04B1/0475

Abstract: A radio frequency (RF) modulator includes: converting means for up-converting a first and second baseband signals into a first and second up-converted signals with a reference clock, wherein a phase difference between the first and second baseband signals substantially equals 180°/N; and combining means for combining the first and second up-converted signals to generate an output signal.

Abstract translation: 射频（RF）调制器包括：用于将第一和第二基带信号上变频为具有参考时钟的第一和第二上变频信号的转换装置，其中第一和第二基带信号之间的相位差基本上等于180° / N; 以及组合装置，用于组合第一和第二上变频信号以产生输出信号。