公开(公告)号：US08372719B2

公开(公告)日：2013-02-12

申请号：US12724157

申请日：2010-03-15

申请人： Sheng-Hsiung Wang ,  Fu-Kai Yang ,  Yuan-Ching Peng ,  Chi-Cheng Hung

发明人： Sheng-Hsiung Wang ,  Fu-Kai Yang ,  Yuan-Ching Peng ,  Chi-Cheng Hung

IPC分类号： H01L21/461 ,  H01L21/027

CPC分类号： H01L21/31144 ,  H01L21/28017 ,  H01L21/31116 ,  H01L29/66795

摘要： A method of removing a hard mask during fabrication of semiconductor devices is provided. A protective layer, such as a bottom anti-reflective coating (BARC) layer or other dielectric layer, is formed over structures formed on a substrate, wherein spacers are formed alongside the structures. In an embodiment, the structures are gate electrodes having a hard mask formed thereon and the spacers are spacers formed alongside the gate electrodes. A photoresist layer is formed over the protective layer, and the photoresist layer may be patterned to remove a portion of the photoresist layer over portions of the protective layer. Thereafter, an etch-back process is performed, such that the protective layer adjacent to the spacers remains to substantially protect the spacers. The hard mask is then removed while the protective layer protects the spacers.

摘要翻译： 提供了在制造半导体器件期间去除硬掩模的方法。 在衬底上形成的结构上形成诸如底部抗反射涂层（BARC）层或其它电介质层的保护层，其中间隔物沿着结构形成。 在一个实施例中，结构是具有形成在其上的硬掩模的栅电极，并且间隔物是与栅电极一起形成的间隔物。 在保护层上形成光致抗蚀剂层，并且可以对光致抗蚀剂层进行图案化以在保护层的部分上去除光致抗蚀剂层的一部分。 此后，执行回蚀处理，使得与间隔物相邻的保护层保持基本上保护间隔物。 然后去除硬掩模，同时保护层保护间隔物。

公开(公告)号：US20110223753A1

公开(公告)日：2011-09-15

申请号：US12724157

申请日：2010-03-15

申请人： Sheng-Hsiung Wang ,  Fu-Kai Yang ,  Yuan-Ching Peng ,  Chi-Cheng Hung

发明人： Sheng-Hsiung Wang ,  Fu-Kai Yang ,  Yuan-Ching Peng ,  Chi-Cheng Hung

IPC分类号： H01L21/3065 ,  H01L21/28

CPC分类号： H01L21/31144 ,  H01L21/28017 ,  H01L21/31116 ,  H01L29/66795

摘要： A method of removing a hard mask during fabrication of semiconductor devices is provided. A protective layer, such as a bottom anti-reflective coating (BARC) layer or other dielectric layer, is formed over structures formed on a substrate, wherein spacers are formed alongside the structures. In an embodiment, the structures are gate electrodes having a hard mask formed thereon and the spacers are spacers formed alongside the gate electrodes. A photoresist layer is formed over the protective layer, and the photoresist layer may be patterned to remove a portion of the photoresist layer over portions of the protective layer. Thereafter, an etch-back process is performed, such that the protective layer adjacent to the spacers remains to substantially protect the spacers. The hard mask is then removed while the protective layer protects the spacers.

摘要翻译： 提供了在制造半导体器件期间去除硬掩模的方法。 在衬底上形成的结构上形成诸如底部抗反射涂层（BARC）层或其它电介质层的保护层，其中间隔物沿着结构形成。 在一个实施例中，结构是具有形成在其上的硬掩模的栅电极，并且间隔物是与栅电极一起形成的间隔物。 在保护层上形成光致抗蚀剂层，并且可以对光致抗蚀剂层进行图案化以在保护层的部分上去除光致抗蚀剂层的一部分。 此后，执行回蚀处理，使得与间隔物相邻的保护层保持基本上保护间隔物。 然后去除硬掩模，同时保护层保护间隔物。

公开(公告)号：US20050215051A1

公开(公告)日：2005-09-29

申请号：US10808802

申请日：2004-03-25

申请人： Fu-Kai Yang ,  Shu-Huei Suen

发明人： Fu-Kai Yang ,  Shu-Huei Suen

IPC分类号： H01L21/4763 ,  H01L21/768

CPC分类号： H01L21/76808 ,  H01L21/76813

摘要： A process for defining a dual damascene opening in a stack of insulator layers to expose a portion of a top surface of an underlying conductive structure, has been developed. The process features a two step procedure for removal of insulator stop layers, wherein the stop layers are employed to allow selective dry etch procedures to be used for definition of both the via opening component and the trench shape component of the dual damascene opening. After definition of the via opening, terminating at the top surface of an underlying, first silicon nitride stop layer, a photoresist shape is used as an etch mask to allow a dry etch procedure to define a trench shape in a top portion of an insulator stack, with the dry etch procedure terminating at the top surface of an overlying second silicon nitride stop layer. The dry etch procedure also results in formation of a photoresist plug in the via hole, located on an underlying, first silicon nitride stop layer. The portion of the second silicon nitride stop layer exposed in the trench shape opening is next selectively removed via a first procedure of the two step, dry etch removal procedure, followed by removal of the trench shape defining photoresist shape and of the photoresist plug. Another dry etch procedure, the second step of the two step dry etch removal procedure, is next performed to selectively remove the portion of underlying, first silicon nitride stop layer exposed in the via opening, resulting in exposure of a portion of the top surface of the conductive structure. The two step, stop layer removal procedure reduces the level of insulator corner rounding at the top of the dual damascene opening, while also reducing damage to the top surface of the underlying conductive structure, exposed at the bottom of the dual damascene opening.

摘要翻译： 已经开发了用于在绝缘体层堆叠中限定双镶嵌开口以暴露下面的导电结构的顶表面的一部分的方法。 该方法具有用于去除绝缘体停止层的两步程序，其中使用停止层以允许选择性干法蚀刻程序用于双镶嵌开口的通孔开口部件和沟槽形状部件的定义。 在通孔开口的定义之后，终止在下面的第一氮化硅阻挡层的顶表面处，使用光致抗蚀剂形状作为蚀刻掩模，以允许干蚀刻工艺在绝缘体堆叠的顶部中限定沟槽形状 ，其中干蚀刻程序终止于覆盖的第二氮化硅阻挡层的顶表面。 干蚀刻程序还导致在通孔中形成位于下面的第一氮化硅阻挡层上的光致抗蚀剂插塞。 接下来通过两步干法蚀刻去除步骤的第一步骤，然后去除限定光致抗蚀剂形状的沟槽形状和光致抗蚀剂插塞，选择性地去除在沟槽形开口中暴露的第二氮化硅阻挡层的部分。 接下来执行另一干法蚀刻步骤，即两步干法蚀刻去除步骤的第二步骤，以选择性地去除在通孔开口中暴露的下面的第一氮化硅阻挡层的部分，导致暴露在顶部表面的一部分 导电结构。 两步骤，停止层去除程序降低了在双镶嵌开口顶部的绝缘子角圆角的水平，同时还减少了暴露在双镶嵌开口底部的下面的导电结构的顶表面的损坏。

公开(公告)号：US20060084276A1

公开(公告)日：2006-04-20

申请号：US10965575

申请日：2004-10-14

申请人： Janet Yu ,  Fu-Kai Yang

发明人： Janet Yu ,  Fu-Kai Yang

IPC分类号： H01L21/42

CPC分类号： H01L21/3105

摘要： A method for patterning a resist protection oxide (RPO) layer and a structure formed therefrom are disclosed. The method forms a RPO layer over a substrate. A patterned photoresist layer is formed over the RPO layer. A process is performed for bombarding a surface of the RPO layer by using ions which substantially do not chemically react with the RPO layer. A portion of the RPO layer is removed. The patterned photoresist layer is then removed. Accordingly, a RPO structure formed by the method described above is also disclosed.

摘要翻译： 公开了一种用于图案化抗蚀剂保护氧化物（RPO）层的方法和由其形成的结构。 该方法在衬底上形成RPO层。 在RPO层上形成图案化的光致抗蚀剂层。 执行用于通过使用基本上不与RPO层发生化学反应的离子来轰击RPO层的表面的过程。 RPO层的一部分被去除。 然后去除图案化的光致抗蚀剂层。 因此，也公开了通过上述方法形成的RPO结构。

公开(公告)号：US07001836B2

公开(公告)日：2006-02-21

申请号：US10808802

申请日：2004-03-25

申请人： Fu-Kai Yang ,  Shu-Huei Suen

发明人： Fu-Kai Yang ,  Shu-Huei Suen

IPC分类号： H01L21/4763

CPC分类号： H01L21/76808 ,  H01L21/76813

摘要： A process for defining a dual damascene opening in a stack of insulator layers to expose a portion of a top surface of an underlying conductive structure, has been developed. The process features a two step procedure for removal of insulator stop layers, wherein the stop layers are employed to allow selective dry etch procedures to be used for definition of both the via opening component and the trench shape component of the dual damascene opening. After definition of the via opening, terminating at the top surface of an underlying, first silicon nitride stop layer, a photoresist shape is used as an etch mask to allow a dry etch procedure to define a trench shape in a top portion of an insulator stack, with the dry etch procedure terminating at the top surface of an overlying second silicon nitride stop layer. The dry etch procedure also results in formation of a photoresist plug in the via hole, located on an underlying, first silicon nitride stop layer. The portion of the second silicon nitride stop layer exposed in the trench shape opening is next selectively removed via a first procedure of the two step, dry etch removal procedure, followed by removal of the trench shape defining photoresist shape and of the photoresist plug. Another dry etch procedure, the second step of the two step dry etch removal procedure, is next performed to selectively remove the portion of underlying, first silicon nitride stop layer exposed in the via opening, resulting in exposure of a portion of the top surface of the conductive structure. The two step, stop layer removal procedure reduces the level of insulator corner rounding at the top of the dual damascene opening, while also reducing damage to the top surface of the underlying conductive structure, exposed at the bottom of the dual damascene opening.

摘要翻译： 已经开发了用于在绝缘体层堆叠中限定双镶嵌开口以暴露下面的导电结构的顶表面的一部分的方法。 该方法具有用于去除绝缘体停止层的两步程序，其中使用停止层以允许选择性干法蚀刻程序用于双镶嵌开口的通孔开口部件和沟槽形状部件的定义。 在通孔开口的定义之后，终止在下面的第一氮化硅阻挡层的顶表面处，使用光致抗蚀剂形状作为蚀刻掩模，以允许干蚀刻工艺在绝缘体堆叠的顶部中限定沟槽形状 ，其中干蚀刻程序终止于覆盖的第二氮化硅阻挡层的顶表面。 干蚀刻程序还导致在通孔中形成位于下面的第一氮化硅阻挡层上的光致抗蚀剂插塞。 接下来通过两步干法蚀刻去除步骤的第一步骤，然后去除限定光致抗蚀剂形状的沟槽形状和光致抗蚀剂插塞，选择性地去除在沟槽形开口中暴露的第二氮化硅阻挡层的部分。 接下来执行另一干法蚀刻步骤，即两步干法蚀刻去除步骤的第二步骤，以选择性地去除在通孔开口中暴露的下面的第一氮化硅阻挡层的部分，导致暴露在顶部表面的一部分 导电结构。 两步骤，停止层去除程序降低了在双镶嵌开口顶部的绝缘子角圆角的水平，同时还减少了暴露在双镶嵌开口底部的下面的导电结构的顶表面的损坏。