公开(公告)号：US20190237540A1

公开(公告)日：2019-08-01

申请号：US16213002

申请日：2018-12-07

Applicant: Shenyang Silicon Technology Co., Ltd.

Inventor： Wenlin GAO ,  Xiang LI ,  Qingchao LIU

IPC: H01L29/06 ,  H01L23/58 ,  H01L23/66 ,  H01L21/762 ,  H01L21/02 ,  H01L21/322

Abstract: An insulating layer structure for a semiconductor product. The insulating layer structure includes a device substrate, a supporting substrate and a thin film layer. The device substrate and the supporting substrate are silicon wafers. The thin film layer(s) is/are arranged on the device substrate or/and the supporting substrate. The device substrate and the supporting substrate are bonded together through the thin film layer arranged on at least one of the device substrate and the supporting substrate to form an integral multilayer SOI structure. The insulating layer structure formed by the present invention solves problems of serious spontaneous heating of an existing SOI device, severe warpage of an existing SOI structure caused by high-temperature annealing, a poor radio frequency characteristic and the like, and has a predictable relatively higher economic and social value.

公开(公告)号：US20190233280A1

公开(公告)日：2019-08-01

申请号：US16213019

申请日：2018-12-07

Applicant: Shenyang Silicon Technology Co., Ltd.

Inventor： Xiang LI

IPC: B81C1/00 ,  B81B1/00

CPC classification number: B81C1/00047 ,  B08B3/08 ,  B32B37/06 ,  B32B38/0008 ,  B32B43/006 ,  B32B2038/0016 ,  B32B2310/14 ,  B32B2313/00 ,  B32B2457/14 ,  B81B1/004 ,  B81B2203/0315 ,  B81B2203/0353 ,  B81C1/00087 ,  B81C1/00357 ,  B81C1/00507 ,  B81C1/00849 ,  B81C2201/0116 ,  B81C2201/0125 ,  B81C2201/0178 ,  B81C2201/019 ,  B81C2201/0192 ,  B81C2201/0194

Abstract: A method for processing a silicon wafer with a through cavity structure. The method is operated in accordance with the following sequence: performing ion implantation on a silicon wafer or pattern wafer; implanting a dummy substrate; bonding the silicon wafer to the pattern wafer; performing grinding and polishing, and thinning the pattern wafer to a depth exposing the pattern; bonding; and peeling the dummy substrate. Compared with the prior art, the present invention is standard in operation, and the product quality can be effectively guaranteed. The product has high cost performance and excellent comprehensive technical effect. The present invention has expectable relatively large economic values and social values.