-
公开(公告)号：US20090155725A1
公开(公告)日：2009-06-18
申请号：US12283449
申请日：2008-09-12
申请人： Shi-Yong Yi , Kyoung-Taek Kim , Hyun-Woo Kim , Dong-Ki Yoon
发明人： Shi-Yong Yi , Kyoung-Taek Kim , Hyun-Woo Kim , Dong-Ki Yoon
IPC分类号： G03F7/20
CPC分类号： H01L21/0332 , H01L21/0276 , H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L21/32139
摘要： For patterning during integrated circuit fabrication, an image layer is activated for forming a respective first type polymer block at each of two nearest activated areas. A layer of block copolymer is formed on the image layer, and a plurality of the first type polymer blocks and a plurality of second and third types of polymer blocks are formed on an area of the image layer between outer edges of the two nearest activated areas, from the block copolymer. At least one of the first, second, and third types of polymer blocks are removed to form a variety of mask structures.
摘要翻译： 为了在集成电路制造期间进行图案化，图像层被激活用于在两个最近的激活区域中的每一个处形成相应的第一类型聚合物块。 在图像层上形成一层嵌段共聚物，多个第一类聚合物嵌段和多个第二和第三类聚合物嵌段形成在图像层的两个最近活化区域的外边缘之间的区域上 ，来自嵌段共聚物。 第一，第二和第三类型的聚合物嵌段中的至少一种被去除以形成各种掩模结构。
-
公开(公告)号：US08334089B2
公开(公告)日：2012-12-18
申请号：US13239555
申请日：2011-09-22
申请人： Shi-Yong Yi , Kyoung-Taek Kim , Hyun-Woo Kim , Dong-Ki Yoon
发明人： Shi-Yong Yi , Kyoung-Taek Kim , Hyun-Woo Kim , Dong-Ki Yoon
CPC分类号： H01L21/0332 , H01L21/0276 , H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L21/32139
摘要： For patterning during integrated circuit fabrication, an image layer is activated for forming a respective first type polymer block at each of two nearest activated areas. A layer of block copolymer is formed on the image layer, and a plurality of the first type polymer blocks and a plurality of second and third types of polymer blocks are formed on an area of the image layer between outer edges of the two nearest activated areas, from the block copolymer. At least one of the first, second, and third types of polymer blocks are removed to form a variety of mask structures.
摘要翻译： 对于在集成电路制造期间的图案化，图像层被激活用于在两个最近的激活区域中的每一个处形成相应的第一类型聚合物块。 在图像层上形成一层嵌段共聚物，多个第一类聚合物嵌段和多个第二和第三类聚合物嵌段形成在图像层的两个最近活化区域的外边缘之间的区域上 ，来自嵌段共聚物。 第一，第二和第三类型的聚合物嵌段中的至少一种被去除以形成各种掩模结构。
-
公开(公告)号：US08053163B2
公开(公告)日：2011-11-08
申请号：US12283449
申请日：2008-09-12
申请人： Shi-Yong Yi , Kyoung-Taek Kim , Hyun-Woo Kim , Dong-Ki Yoon
发明人： Shi-Yong Yi , Kyoung-Taek Kim , Hyun-Woo Kim , Dong-Ki Yoon
CPC分类号： H01L21/0332 , H01L21/0276 , H01L21/0337 , H01L21/0338 , H01L21/31144 , H01L21/32139
摘要： For patterning during integrated circuit fabrication, an image layer is activated for forming a respective first type polymer block at each of two nearest activated areas. A layer of block copolymer is formed on the image layer, and a plurality of the first type polymer blocks and a plurality of second and third types of polymer blocks are formed on an area of the image layer between outer edges of the two nearest activated areas, from the block copolymer. At least one of the first, second, and third types of polymer blocks are removed to form a variety of mask structures.
摘要翻译： 对于在集成电路制造期间的图案化，图像层被激活用于在两个最近的激活区域中的每一个处形成相应的第一类型聚合物块。 在图像层上形成一层嵌段共聚物，多个第一类聚合物嵌段和多个第二和第三类聚合物嵌段形成在图像层的两个最近活化区域的外边缘之间的区域上 ，来自嵌段共聚物。 第一，第二和第三类型的聚合物嵌段中的至少一种被去除以形成各种掩模结构。
-
公开(公告)号：US08029688B2
公开(公告)日：2011-10-04
申请号：US12217784
申请日：2008-07-09
申请人： Shi-Yong Yi , Myeong-Cheol Kim , Dong-Ki Yoon , Kyung-Yub Jeon , Ji-Hoon Cha
发明人： Shi-Yong Yi , Myeong-Cheol Kim , Dong-Ki Yoon , Kyung-Yub Jeon , Ji-Hoon Cha
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/3086 , H01L21/3088 , H01L21/312 , H01L21/32139
摘要： For patterning during integrated circuit fabrication, a first pattern of first masking structures is formed, and a buffer layer is formed on exposed surfaces of the first masking structures. Also, a second pattern of second masking structures is formed in recesses between the buffer layer at sidewalls of the first masking structures. Furthermore, the first and masking structures are formed from spin-coating respective high carbon containing materials. Such first and second masking structures pattern a target layer with higher pitch than possible with traditional photolithography.
摘要翻译： 为了在集成电路制造期间进行图案化，形成第一掩模结构的第一图案，并且在第一掩模结构的暴露表面上形成缓冲层。 此外，在第一掩蔽结构的侧壁处的缓冲层之间的凹部中形成第二掩模结构的第二图案。 此外，第一掩模结构和掩模结构由各自含高含碳材料的旋涂形成。 这样的第一和第二掩模结构以比传统光刻法更高的间距对目标层进行图案化。
-
公开(公告)号：US08349200B2
公开(公告)日：2013-01-08
申请号：US13217544
申请日：2011-08-25
申请人： Shi-Yong Yi , Myeong-Cheol Kim , Dong-Ki Yoon , Kyung-Yub Jeon , Ji-Hoon Cha
发明人： Shi-Yong Yi , Myeong-Cheol Kim , Dong-Ki Yoon , Kyung-Yub Jeon , Ji-Hoon Cha
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/3086 , H01L21/3088 , H01L21/312 , H01L21/32139
摘要： For patterning during integrated circuit fabrication, a first pattern of first masking structures is formed, and a buffer layer is formed on exposed surfaces of the first masking structures. Also, a second pattern of second masking structures is formed in recesses between the buffer layer at sidewalls of the first masking structures. Furthermore, the first and masking structures are formed from spin-coating respective high carbon containing materials. Such first and second masking structures pattern a target layer with higher pitch than possible with traditional photolithography.
-
公开(公告)号：US20110312183A1
公开(公告)日：2011-12-22
申请号：US13217544
申请日：2011-08-25
申请人： Shi-Yong Yi , Myeong-Cheol Kim , Dong-Ki Yoon , Kyung-Yub Jeon , Ji-Hoon Cha
发明人： Shi-Yong Yi , Myeong-Cheol Kim , Dong-Ki Yoon , Kyung-Yub Jeon , Ji-Hoon Cha
IPC分类号： H01L21/306 , H01L21/31
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/3086 , H01L21/3088 , H01L21/312 , H01L21/32139
摘要： For patterning during integrated circuit fabrication, a first pattern of first masking structures is formed, and a buffer layer is formed on exposed surfaces of the first masking structures. Also, a second pattern of second masking structures is formed in recesses between the buffer layer at sidewalls of the first masking structures. Furthermore, the first and masking structures are formed from spin-coating respective high carbon containing materials. Such first and second masking structures pattern a target layer with higher pitch than possible with traditional photolithography.
摘要翻译： 为了在集成电路制造期间进行图案化，形成第一掩模结构的第一图案，并且在第一掩模结构的暴露表面上形成缓冲层。 此外，在第一掩蔽结构的侧壁处的缓冲层之间的凹部中形成第二掩模结构的第二图案。 此外，第一掩模结构和掩模结构由各自含高含碳材料的旋涂形成。 这样的第一和第二掩模结构以比传统光刻法更高的间距对目标层进行图案化。
-
公开(公告)号：US20090176376A1
公开(公告)日：2009-07-09
申请号：US12217784
申请日：2008-07-09
申请人： Shi-Yong Yi , Myeong-Cheol Kim , Dong-Ki Yoon , Kyung-Yub Jeon , Ji-Hoon Cha
发明人： Shi-Yong Yi , Myeong-Cheol Kim , Dong-Ki Yoon , Kyung-Yub Jeon , Ji-Hoon Cha
IPC分类号： H01L21/308
CPC分类号： H01L21/0337 , H01L21/0338 , H01L21/3086 , H01L21/3088 , H01L21/312 , H01L21/32139
摘要： For patterning during integrated circuit fabrication, a first pattern of first masking structures is formed, and a buffer layer is formed on exposed surfaces of the first masking structures. Also, a second pattern of second masking structures is formed in recesses between the buffer layer at sidewalls of the first masking structures. Furthermore, the first and masking structures are formed from spin-coating respective high carbon containing materials. Such first and second masking structures pattern a target layer with higher pitch than possible with traditional photolithography.
摘要翻译： 为了在集成电路制造期间进行图案化，形成第一掩模结构的第一图案，并且在第一掩模结构的暴露表面上形成缓冲层。 此外，在第一掩蔽结构的侧壁处的缓冲层之间的凹部中形成第二掩模结构的第二图案。 此外，第一掩模结构和掩模结构由各自含高含碳材料的旋涂形成。 这样的第一和第二掩模结构以比传统光刻法更高的间距对目标层进行图案化。
-
-
-
-
-
-
搜索结果
7 条记录 (耗时 0.019 秒)
