Method of fabricating rugged capacitor of high density DRAMs
    1.
    发明授权
    Method of fabricating rugged capacitor of high density DRAMs 失效
    制造高密度DRAM耐久电容器的方法

    公开(公告)号:US5923989A

    公开(公告)日:1999-07-13

    申请号:US81598

    申请日:1998-05-20

    IPC分类号: H01L21/02 H01L21/8242

    CPC分类号: H01L27/10852 H01L28/84

    摘要: A method of fabricating a rugged capacitor structure of high density Dynamic Random Access Memory (DRAM) cells is disclosed. First, MOSFETs, wordlines and bitlines are formed on a semiconductor silicon substrate. Next, a dielectric layer and a doped polysilicon layer are sequentially deposited over the entire silicon substrate. The dielectric layer and doped polysilicon layer are then partially etched to open source contact windows. Then, a polysilicon layer is deposited overlaying the doped polysilicon layer and filling into the source contact windows. Next, the polysilicon layer and doped polysilicon layers are partially etched to define bottom electrodes of the capacitors. Next, tilt angle implantation is performed to implant impurities into top surface and four sidewalls of the polysilicon layer and doped polysilicon layer. Next, a rugged polysilicon layer is deposited overlaying the polysilicon, doped polysilicon and third dielectric layers. Next, the polysilicon layer is anisotropically etched by using the rugged polysilicon layer as an etching mask to transfer rugged surface profile from the rugged polysilicon layer to the polysilicon layer. Finally, an interelectrode dielectric layer and a third polysilicon layer as top electrodes of the capacitors are sequentially formed to complete the rugged capacitor for high density DRAM applications.

    摘要翻译: 公开了一种制造高密度动态随机存取存储器(DRAM)单元的坚固电容器结构的方法。 首先,在半导体硅衬底上形成MOSFET,字线和位线。 接下来,在整个硅衬底上依次沉积介电层和掺杂多晶硅层。 然后将电介质层和掺杂多晶硅层部分地蚀刻到开源接触窗口。 然后,沉积覆盖掺杂多晶硅层并填充到源极接触窗口中的多晶硅层。 接下来,部分蚀刻多晶硅层和掺杂多晶硅层以限定电容器的底部电极。 接下来,进行倾斜角注入以将杂质植入多晶硅层的顶表面和四个侧壁以及掺杂多晶硅层。 接下来,沉积覆盖多晶硅,掺杂多晶硅和第三介电层的坚固的多晶硅层。 接下来,通过使用坚固的多晶硅层作为蚀刻掩模来将多晶硅层各向异性地蚀刻,以将粗糙的表面轮廓从坚固的多晶硅层转移到多晶硅层。 最后,依次形成作为电容器顶电极的电极间电介质层和第三多晶硅层,以完成用于高密度DRAM应用的坚固电容器。