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公开(公告)号：US07079660B2
公开(公告)日：2006-07-18
申请号：US10121604
申请日：2002-04-15
申请人： Shigeji Ohama , Hiroyuki Saito
发明人： Shigeji Ohama , Hiroyuki Saito
IPC分类号： H03G5/00
摘要： The bass compensation device of the present invention includes a high frequency removing circuit for removing a high frequency component of an input sound signal; an absolute value circuit for full-wave rectifying an output signal of the high frequency removing circuit; a band limit circuit for selectively passing only a predetermined frequency range component from the output signal of the absolute value circuit; and an amplifier for amplifying the output signal of the band limit circuit, and bass compensation is performed by the output signal of the amplifier. This structure can realize a bass compensation device excellent in distortion-factor property and transient property.
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公开(公告)号：US06590984B2
公开(公告)日：2003-07-08
申请号：US10058860
申请日：2002-01-28
申请人： Shigeji Ohama , Hiroyuki Saito
发明人： Shigeji Ohama , Hiroyuki Saito
IPC分类号： H04R2900
摘要： The sound quality regulation apparatus has one attenuation unit and one amplification unit connected in series in this order in the signal line of the apparatus. The output of the attenuation unit is fed to a multiplicity of sound regulators associated with the split frequency bands of the input signal. Each sound regulator includes a switched capacity filter and a selector for selectively supplying the output of the sound regulator to either the attenuation unit, amplification unit, or none of these units. The sound quality regulation apparatus is thus capable of individually attenuating, enhancing, or not changing split frequency bands of the input signal.
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公开(公告)号：US20090102550A1
公开(公告)日：2009-04-23
申请号：US11917113
申请日：2006-06-06
申请人： Shigeji Ohama , Satoshi Oishi
发明人： Shigeji Ohama , Satoshi Oishi
IPC分类号： H03F3/38
摘要： An integrator generates analog voltage in a manner that in an active state a duty ratio of an output signal of an class D amplifier is brought close to a duty ratio defined by an analog audio signal. A first mute circuit forcibly turns on the class D amplifier in an active state. In an active state, A voltage-fixing circuit fixes an output terminal of the class D amplifier to a predetermined fixed potential of Vdd/2. A second mute circuit is provided between an output terminal of a filter and ground, and connects the output terminal of the filter to ground in an active state. A mute control unit controls the integrator, the first mute circuit, the voltage-fixing circuit and the second mute circuit, respectively. As a result, the noise at the time of start and stop can be optimally reduced.
摘要翻译： 积分器以在激活状态下产生模拟电压，使D类放大器的输出信号的占空比接近由模拟音频信号定义的占空比。 第一个静音电路在激活状态下强制打开D类放大器。 在激活状态下，A电压固定电路将D类放大器的输出端固定在预定的Vdd / 2的固定电位。 在滤波器的输出端子和地之间设置第二静音电路，并将滤波器的输出端子连接到接地状态。 静音控制单元分别控制积分器，第一静音电路，电压固定电路和第二静音电路。 结果，可以最佳地降低启动和停止时的噪音。
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公开(公告)号：US07459968B2
公开(公告)日：2008-12-02
申请号：US11661792
申请日：2005-09-09
申请人： Shigeji Ohama , Satoshi Oishi , Masatsugu Souma
发明人： Shigeji Ohama , Satoshi Oishi , Masatsugu Souma
IPC分类号： H03F3/38
CPC分类号： H03F3/217 , H03F3/187 , H03F3/68 , H03F2200/03 , H03F2200/249 , H03F2200/345 , H03F2200/351
摘要： An audio power amplifier IC which is capable of suppressing degradation in sound quality resulting from the frequency of a reference clock, and an audio system provided with the audio power amplifier IC are provided. The audio power amplifier IC includes a clock generation circuit generating an internal clock, a clock terminal for outputting the internal clock or receiving an external clock, a clock selection circuit selecting the internal clock or the external clock as a reference clock, a first audio signal input terminal for receiving a first audio signal, and a first digital power amplifier circuit performing pulse modulation on the first audio signal based on the reference clock to output a pulse synchronized with the reference clock.
摘要翻译： 提供能够抑制由参考时钟的频率引起的声音质量劣化的音频功率放大器IC以及配备有音频功率放大器IC的音频系统。 音频功率放大器IC包括产生内部时钟的时钟产生电路，用于输出内部时钟或接收外部时钟的时钟端子，选择内部时钟或外部时钟作为参考时钟的时钟选择电路，第一音频信号 用于接收第一音频信号的输入端子以及基于所述参考时钟对所述第一音频信号执行脉冲调制的第一数字功率放大器电路，以输出与所述参考时钟同步的脉冲。
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公开(公告)号：US20070252644A1
公开(公告)日：2007-11-01
申请号：US11661792
申请日：2005-09-09
申请人： Shigeji Ohama , Satoshi Oishi , Masatsugu Souma
发明人： Shigeji Ohama , Satoshi Oishi , Masatsugu Souma
CPC分类号： H03F3/217 , H03F3/187 , H03F3/68 , H03F2200/03 , H03F2200/249 , H03F2200/345 , H03F2200/351
摘要： An audio power amplifier IC which is capable of suppressing degradation in sound quality resulting from the frequency of a reference clock, and an audio system provided with the audio power amplifier IC are provided. The audio power amplifier IC includes a clock generation circuit (10) generating an internal clock, a clock terminal (CLK) for outputting the internal clock or receiving an external clock, a clock selection circuit (11) selecting the internal clock or the external clock as a reference clock (BCLK), a first audio signal input terminal (IN1) for receiving a first audio signal (Lin), and a first digital power amplifier circuit (51) performing pulse modulation on the first audio signal (Lin) based on the reference clock (BCLK) to output a pulse synchronized with the reference clock (BCLK).
摘要翻译： 提供能够抑制由参考时钟的频率引起的声音质量劣化的音频功率放大器IC以及配备有音频功率放大器IC的音频系统。 音频功率放大器IC包括产生内部时钟的时钟产生电路（10），用于输出内部时钟或接收外部时钟的时钟端子（CLK），选择内部时钟或外部时钟的时钟选择电路（11） 作为参考时钟（BCLK），用于接收第一音频信号（Lin）的第一音频信号输入端（IN1）和基于第一音频信号（Lin）对第一音频信号（Lin）执行脉冲调制的第一数字功率放大器电路 参考时钟（BCLK）输出与参考时钟（BCLK）同步的脉冲。
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