公开(公告)号：US20100283106A1

公开(公告)日：2010-11-11

申请号：US12841253

申请日：2010-07-22

Applicant: Shigeru MORI

Inventor： Shigeru MORI

IPC: H01L29/786 ,  H01L21/314

CPC classification number: H01L23/28 ,  H01L21/02365 ,  H01L29/02 ,  H01L29/66757 ,  H01L29/78 ,  H01L29/78603 ,  H01L29/78606 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device in which a semiconductor layer is formed on an insulating substrate with a front-end insulating layer interposed between the semiconductor layer and the insulating substrate is provided which is capable of preventing action of an impurity contained in the insulating substrate on the semiconductor layer and of improving reliability of the semiconductor device. In a TFT (Thin Film Transistor), boron is made to be contained in a region located about 100 nm or less apart from a surface of the insulating substrate so that boron concentration decreases at an average rate being about 1/1000-fold per 1 nm from the surface of the insulating substrate toward the semiconductor layer.

Abstract translation: 提供一种半导体器件，其中半导体层形成在绝缘基板上，其中插入在半导体层和绝缘基板之间的前端绝缘层，其能够防止绝缘基板中包含的杂质对半导体层的作用 并提高半导体器件的可靠性。 在TFT（薄膜晶体管）中，使硼被包含在距离绝缘基板的表面约100nm以下的区域中，使得硼浓度以平均速率降低约1/1000倍/ 1 从绝缘基板的表面朝向半导体层。

公开(公告)号：US20090286374A1

公开(公告)日：2009-11-19

申请号：US12508888

申请日：2009-07-24

Applicant: Shigeru MORI ,  Takahiro KORENARI ,  Tadahiro MATSUZAKI ,  Hiroshi TANABE

Inventor： Shigeru MORI ,  Takahiro KORENARI ,  Tadahiro MATSUZAKI ,  Hiroshi TANABE

IPC: H01L21/336 ,  H01L21/26 ,  H01L21/302

CPC classification number: H01L29/78621 ,  H01L29/66757

Abstract: A base layer is formed on an insulating substrate, and a semiconductor layer is formed in localized fashion thereon. A gate insulating film is then formed so as to cover the semiconductor layer, and a gate electrode is formed on a portion of the gate insulating film. An impurity is then implanted into the semiconductor layer via the gate insulating film, and a source region, a drain region, and an LDD region are formed. The gate insulating film is etched with dilute hydrofluoric acid. An electrode-protecting insulating film is then formed so as to cover the gate electrode, and the entire surface of the surface layer portion of the electrode-protecting insulating film is etched away using dilute hydrofluoric acid. Carrier traps introduced into the electrode-protecting insulating film and the gate insulating film are thereby removed.

Abstract translation: 在绝缘基板上形成基底层，以局部方式形成半导体层。 然后形成栅极绝缘膜以覆盖半导体层，并且栅极电极形成在栅极绝缘膜的一部分上。 然后通过栅极绝缘膜将杂质注入到半导体层中，形成源极区，漏极区和LDD区。 用稀氢氟酸蚀刻栅极绝缘膜。 然后形成电极保护绝缘膜以覆盖栅电极，并且使用稀氢氟酸腐蚀掉电极保护绝缘膜的表面层部分的整个表面。 因此，引入到电极保护绝缘膜和栅极绝缘膜中的载流子阱被去除。

公开(公告)号：US20110198607A1

公开(公告)日：2011-08-18

申请号：US13026683

申请日：2011-02-14

Applicant: Shigeru MORI ,  Takahiro KORENARI ,  Hiroshi TANABE

Inventor： Shigeru MORI ,  Takahiro KORENARI ,  Hiroshi TANABE

IPC: H01L29/786

CPC classification number: H01L33/58 ,  H01L29/7833 ,  H01L29/78621 ,  H01L29/78633

Abstract: A thin-film transistor manufactured on a transparent substrate has a structure of a top gate type crystalline silicon thin-film transistor in which a light blocking film, a base layer, a crystalline silicon film, a gate insulating film, and a gate electrode film arranged not to overlap at least a channel region are sequentially formed on the transparent substrate. The channel region has channel length L, LDD regions having LDD length d on both sides of the channel region, a source region, and a drain region are formed in the crystalline silicon film. The light blocking film is divided across the channel region. Interval x between the divided light blocking films is equal to or larger than channel length L and equal to or smaller than a sum of channel length L and a double of LDD length d (L+2d), allowing low the manufacturing cost and suppressed photo leak current.

Abstract translation: 制造在透明基板上的薄膜晶体管具有顶栅型晶体硅薄膜晶体管的结构，其中遮光膜，基底层，晶体硅膜，栅极绝缘膜和栅极电极膜 排列成不重叠的至少一个沟道区域依次形成在透明基板上。 沟道区具有沟道长度L，在晶体硅膜中形成在沟道区两侧具有LDD长度d的LDD区，源区和漏区。 遮光膜在通道区域上分开。 分割的遮光膜之间的间隔x等于或大于沟道长度L，并且等于或小于沟道长度L的和和LDD长度d（L + 2d）的两倍，从而允许低的制造成本和抑制的照片 泄漏电流。

公开(公告)号：US20080296580A1

公开(公告)日：2008-12-04

申请号：US12131249

申请日：2008-06-02

Applicant: Shigeru MORI ,  Hiroshi TANABE ,  Jun TANAKA

Inventor： Shigeru MORI ,  Hiroshi TANABE ,  Jun TANAKA

IPC: H05H1/24 ,  H01L29/786

CPC classification number: H01L29/4908

Abstract: The present invention provides a high-performance silicon oxide film as a gate insulation film and a semiconductor device having superior electric characteristics. The silicon oxide film according to the present invention includes CO2 in the film, wherein, when an integrated intensity of a peak is expressed by (peak width at half height)×(peak height) in an infrared absorption spectrum, the integrated intensity of a CO2-attributed peak which appears in the vicinity of a wave number of 2,340 cm−1 is 8E-4 times or more with respect to the integrated intensity of an SiO2-attributed peak which appears in the vicinity of a wave number of 1,060 cm−1.

Abstract translation: 本发明提供一种作为栅绝缘膜的高性能氧化硅膜和具有优异电特性的半导体器件。 根据本发明的氧化硅膜在膜中包括CO 2，其中当峰的积分强度由红外吸收光谱中的（峰值高度）x（峰高））表示时，积分强度为 出现在2,340cm-1波数附近的二氧化碳归属峰相对于出现在波数为1060cm -1附近的SiO 2归属峰的积分强度为8E-4倍以上， 1。