公开(公告)号：US20180166855A1

公开(公告)日：2018-06-14

申请号：US15836601

申请日：2017-12-08

申请人： MEIJO UNIVERSITY ,  STANLEY ELECTRIC CO., LTD.

发明人： Tetsuya TAKEUCHI ,  Isamu AKASAKI ,  Takanobu AKAGI

IPC分类号： H01S5/183 ,  H01S5/026

CPC分类号： H01S5/18377 ,  H01L21/02365 ,  H01S5/026 ,  H01S5/18341 ,  H01S5/18361 ,  H01S5/18369 ,  H01S5/3063 ,  H01S5/3201 ,  H01S5/32341 ,  H01S2304/04

摘要： Provided is a semiconductor multilayer film reflecting mirror formed by alternately repeating a first nitride film containing In (indium) and a second nitride film not containing In. The reflecting mirror includes an inter-film transition layer between the first and second nitride films, the composition of which is varied from the composition of the first nitride film to the composition of the second nitride film. The inter-film transition layer has a first transition layer formed on the first nitride film and containing In and Al (aluminum), and a second transition layer formed on the first transition layer and containing Al but not containing In. In the first transition layer, the percentages of In and Al are decreased from the first nitride film to the second transition layer, and the percentage of In in the first transition layer starts to decrease at a same or closer position to the first nitride film than the percentage of Al.

公开(公告)号：US20180053856A1

公开(公告)日：2018-02-22

申请号：US15785562

申请日：2017-10-17

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Takahiro SATO ,  Yasutaka NAKAZAWA ,  Takayuki CHO ,  Shunsuke KOSHIOKA ,  Hajime TOKUNAGA ,  Masami JINTYOU

IPC分类号： H01L29/786 ,  H01L21/02 ,  H01L27/32 ,  H01L29/10 ,  H01L21/465 ,  G02F1/1368 ,  H01L27/12 ,  H01L29/66 ,  H01L29/06 ,  H01L29/24 ,  G02F1/1362 ,  H01L29/423 ,  H01L29/04 ,  H01L21/306

CPC分类号： H01L29/78696 ,  G02F1/136277 ,  G02F1/1368 ,  H01L21/02365 ,  H01L21/02403 ,  H01L21/02422 ,  H01L21/02551 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/30604 ,  H01L21/465 ,  H01L27/1225 ,  H01L27/1259 ,  H01L27/3248 ,  H01L29/045 ,  H01L29/0657 ,  H01L29/1033 ,  H01L29/24 ,  H01L29/42356 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/7869 ,  H01L29/78693

摘要： A transistor includes a multilayer film in which an oxide semiconductor film and an oxide film are stacked, a gate electrode, and a gate insulating film. The multilayer film overlaps with the gate electrode with the gate insulating film interposed therebetween. The multilayer film has a shape having a first angle between a bottom surface of the oxide semiconductor film and a side surface of the oxide semiconductor film and a second angle between a bottom surface of the oxide film and a side surface of the oxide film. The first angle is acute and smaller than the second angle. Further, a semiconductor device including such a transistor is manufactured.

公开(公告)号：US20170330757A1

公开(公告)日：2017-11-16

申请号：US15594482

申请日：2017-05-12

申请人： OSRAM Opto Semiconductors GmbH

发明人： Christoph EICHLER ,  Andre SOMERS ,  Harald KOENIG ,  Bernhard STOJETZ ,  Andreas LOEFFLER ,  Alfred LELL

IPC分类号： H01L21/268 ,  H01L21/324 ,  H01L21/3105

CPC分类号： H01L27/1285 ,  H01L21/02104 ,  H01L21/02293 ,  H01L21/02365 ,  H01L21/0254 ,  H01L21/02617 ,  H01L21/02636 ,  H01L21/02647 ,  H01L21/20 ,  H01L21/2022 ,  H01L21/268 ,  H01L21/3105 ,  H01L21/3247 ,  H01L21/76248 ,  H01L21/76272 ,  H01L27/1281 ,  H01L33/007 ,  H01L33/025 ,  H01L33/08 ,  H01L33/12 ,  H01L2933/0016 ,  H01S5/2068 ,  H01S5/2077 ,  H01S5/222 ,  H01S5/223 ,  H01S2304/00

摘要： A method for producing a semiconductor chip (100) is provided, in which, during a growth process for growing a first semiconductor layer (1), an inhomogeneous lateral temperature distribution is created along at least one direction of extent of the growing first semiconductor layer (1), such that a lateral variation of a material composition of the first semiconductor layer (1) is produced. A semiconductor chip (100) is additionally provided.

公开(公告)号：US20170317317A1

公开(公告)日：2017-11-02

申请号：US14778262

申请日：2015-07-17

申请人： Shenzhen China Star Optoelectronics Technology Co., Ltd.

发明人： Chao Xu

IPC分类号： H01L51/56 ,  H01L51/00

CPC分类号： H01L51/56 ,  H01L21/02118 ,  H01L21/02365 ,  H01L23/293 ,  H01L25/047 ,  H01L27/28 ,  H01L27/32 ,  H01L29/84 ,  H01L51/0097 ,  H01L2251/5315 ,  H01L2251/5338

摘要： Disclosed is a method for manufacturing a flexible organic light-emitting diode (OLED) display component which includes steps of: forming a ferromagnetic material layer on a surface of a flexible substrate; and abutting the ferromagnetic material layer against a flat bearing surface, and applying a magnetic pull force directing to the bearing surface on the ferromagnetic material layer. Drawn by the magnetic pull force, the ferromagnetic material layer abuts closely against the flat bearing surface, smoothing out the flexible substrate, and meanwhile fixing the flexible substrate on the bearing surface.

公开(公告)号：US20170250073A1

公开(公告)日：2017-08-31

申请号：US15595503

申请日：2017-05-15

申请人： International Business Machines Corporation

发明人： Takashi Ando ,  Eduard A. Cartier ,  Michael P. Chudzik ,  Aritra Dasgupta ,  Herbert L. Ho ,  Donghun Kang ,  Rishikesh Krishnan ,  Vijay Narayanan ,  Kern Rim

IPC分类号： H01L21/02 ,  H01L21/20 ,  H01G4/005 ,  H01L21/322

CPC分类号： H01L21/02365 ,  H01G4/005 ,  H01L21/02178 ,  H01L21/02617 ,  H01L21/20 ,  H01L21/3221 ,  H01L23/26 ,  H01L27/10861 ,  H01L27/1087 ,  H01L28/60 ,  H01L28/90 ,  H01L29/66181 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method including forming an oxygen gettering layer on one side of an insulating layer of a deep trench capacitor between the insulating layer and a substrate, the oxygen gettering layer including an aluminum containing compound, and depositing an inner electrode on top of the insulating layer, the inner electrode including a metal.

公开(公告)号：US20170243993A1

公开(公告)日：2017-08-24

申请号：US15510473

申请日：2015-09-02

申请人： FLISOM AG ,  EMPA

发明人： Patrick REINHARD ,  Benjamin BISSIG ,  Stephan BUECHELER ,  Ayodhya Nath TIWARI ,  Fabian PIANEZZI

IPC分类号： H01L31/032

CPC分类号： H01L31/02167 ,  B81C1/00031 ,  B81C2201/0149 ,  H01L21/02104 ,  H01L21/02365 ,  H01L21/02422 ,  H01L21/02491 ,  H01L21/02568 ,  H01L21/02664 ,  H01L27/142 ,  H01L31/0216 ,  H01L31/02168 ,  H01L31/02327 ,  H01L31/0322 ,  H01L31/04 ,  Y02E10/541 ,  Y02P70/521

摘要： A method (200) for fabricating patterns on the surface of a layer of a device (100), the method comprising: providing at least one layer (130, 230); adding at least one alkali metal (235); controlling the temperature (2300) of the at least one layer, thereby forming a plurality of self-assembled, regularly spaced, parallel lines of alkali compound embossings (1300, 1305) at the surface of the layer. The method further comprises forming cavities (236, 1300) by dissolving the alkali compound embossings. The method (200) is advantageous for nanopatterning of devices (100) without using templates and for the production of high efficiency optoelectronic thin-film devices (100).

公开(公告)号：US09653534B2

公开(公告)日：2017-05-16

申请号：US14572974

申请日：2014-12-17

申请人： International Business Machines Corporation

发明人： Takashi Ando ,  Eduard A. Cartier ,  Michael P. Chudzik ,  Aritra Dasgupta ,  Herbert L. Ho ,  Donghun Kang ,  Rishikesh Krishnan ,  Vijay Narayanan ,  Kern Rim

IPC分类号： H01L29/66 ,  H01L49/02 ,  H01L27/108 ,  H01L23/26

CPC分类号： H01L21/02365 ,  H01G4/005 ,  H01L21/02178 ,  H01L21/02617 ,  H01L21/20 ,  H01L21/3221 ,  H01L23/26 ,  H01L27/10861 ,  H01L27/1087 ,  H01L28/60 ,  H01L28/90 ,  H01L29/66181 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method including forming an oxygen gettering layer on one side of an insulating layer of a deep trench capacitor between the insulating layer and a substrate, the oxygen gettering layer including an aluminum containing compound, and depositing an inner electrode on top of the insulating layer, the inner electrode including a metal.

公开(公告)号：US09515139B2

公开(公告)日：2016-12-06

申请号：US14746398

申请日：2015-06-22

申请人： QUALCOMM Incorporated

发明人： Anton Arriagada ,  Michael A. Stuber ,  Stuart B. Molin

IPC分类号： H01L21/30 ,  H01L29/06 ,  H01L21/02 ,  H01L21/20 ,  H01L21/84 ,  H01L29/78 ,  H01L27/12 ,  H01L21/268 ,  H01L21/304 ,  H01L21/306 ,  H01L21/762

CPC分类号： H01L29/0692 ,  H01L21/02365 ,  H01L21/2007 ,  H01L21/268 ,  H01L21/304 ,  H01L21/30604 ,  H01L21/76243 ,  H01L21/76251 ,  H01L21/7806 ,  H01L21/84 ,  H01L25/00 ,  H01L27/1203 ,  H01L29/7803

摘要： A trap rich layer for an integrated circuit chip is formed by chemical etching and/or laser texturing of a surface of a semiconductor layer. In some embodiments, a trap rich layer is formed by a technique selected from the group of techniques consisting of laser texturing, chemical etch, irradiation, nanocavity formation, porous Si-etch, semi-insulating polysilicon, thermal stress relief and mechanical texturing. Additionally, combinations of two or more of these techniques may be used to form a trap rich layer.

公开(公告)号：US09431490B2

公开(公告)日：2016-08-30

申请号：US13963035

申请日：2013-08-09

申请人： Infineon Technologies Austria AG

发明人： Hans-Joachim Schulze ,  Franz Hirler ,  Anton Mauder

IPC分类号： H01L21/02 ,  H01L29/36 ,  H01L21/22 ,  H01L29/66 ,  H01L29/739 ,  H01L29/78 ,  H01L21/324 ,  H01L29/861 ,  H01L29/40 ,  H01L29/417 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10

CPC分类号： H01L29/1083 ,  H01L21/02365 ,  H01L21/22 ,  H01L21/30604 ,  H01L21/3247 ,  H01L29/0619 ,  H01L29/0634 ,  H01L29/0638 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/402 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/66068 ,  H01L29/7395 ,  H01L29/7396 ,  H01L29/7397 ,  H01L29/74 ,  H01L29/7788 ,  H01L29/7811 ,  H01L29/7813 ,  H01L29/8083 ,  H01L29/861 ,  H01L29/8611

摘要： A power semiconductor device includes a semiconductor body having a first side, a second side opposite the first side and an outer rim. The semiconductor body includes an active region, an edge termination region arranged between the active region and the outer rim, a first doping region in the active region and connected to a first electrode arranged on the first side, a second doping region in the active region and the edge termination region and connected to a second electrode arranged on the second side, a drift region between the first doping region and the second doping region, the drift region including a first portion adjacent to the first side and a second portion arranged between the first portion and the second doping region, and an insulating region arranged in the edge termination region between the second doping region and the first portion of the drift region.

摘要翻译： 功率半导体器件包括具有第一侧，与第一侧相对的第二侧和外缘的半导体本体。 半导体本体包括有源区，布置在有源区和外边缘之间的边缘终端区，有源区中的第一掺杂区，并连接到布置在第一侧上的第一电极，有源区中的第二掺杂区 和边缘终止区域，并且连接到布置在第二侧上的第二电极，在第一掺杂区域和第二掺杂区域之间的漂移区域，漂移区域包括与第一侧相邻的第一部分和布置在第二掺杂区域之间的第二部分 第一掺杂区和第二掺杂区，以及布置在第二掺杂区域和漂移区域的第一部分之间的边缘终止区域中的绝缘区域。

公开(公告)号：US09425249B2

公开(公告)日：2016-08-23

申请号：US13990743

申请日：2010-12-01

申请人： Andrew Norman

发明人： Andrew Norman

IPC分类号： H01L31/0264 ,  H01L29/04 ,  H01L21/02 ,  H01L31/036 ,  H01L31/076 ,  H01L31/18 ,  H01L33/00 ,  H01L31/0725 ,  H01L33/26 ,  H01L31/056 ,  H01L33/12

CPC分类号： H01L29/04 ,  H01L21/02365 ,  H01L21/02381 ,  H01L21/02395 ,  H01L21/0242 ,  H01L21/02439 ,  H01L21/02491 ,  H01L21/02502 ,  H01L21/02521 ,  H01L31/036 ,  H01L31/056 ,  H01L31/0725 ,  H01L31/076 ,  H01L31/1852 ,  H01L33/007 ,  H01L33/12 ,  H01L33/26 ,  Y02E10/52 ,  Y02E10/544 ,  Y02E10/548

摘要： A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a silicon substrate using a compliant buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The compliant buffer material and semiconductor materials may be deposited using coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The coincident site lattice matching epitaxial process, as well as the use of a ductile buffer material, reduce the internal stresses and associated crystal defects within the deposited semiconductor materials fabricated using the disclosed method. As a result, the semiconductor devices provided herein possess enhanced performance characteristics due to a relatively low density of crystal defects.

摘要翻译： 提供了一种制造半导体材料的方法以及结合半导体材料的器件。 特别地，提供了使用兼容缓冲层在硅衬底上制造诸如III-V半导体的半导体材料的方法，以及诸如并入半导体材料的诸如光伏电池的器件。 顺应性缓冲材料和半导体材料可以使用重合的位点晶格匹配外延沉积，导致用于各种材料组成的衬底材料和沉积材料之间的格子匹配的紧密程度。 使用本发明的方法制造的沉积的半导体材料中的重合位点晶格匹配外延工艺以及延性缓冲材料的使用降低了内部应力和相关的晶体缺陷。 结果，这里提供的半导体器件由于晶体缺陷的密度相对较低而具有增强的性能特性。