摘要:
A low power-consumption active matrix display device including gate lines, drain lines, and pixel electrodes, which are arranged at intersections between the gate lines and the drain lines. A drain line driver is connected to the drain lines to select a drain line and provide the selected drain line with an image signal. A gate line driver is connected to the gate lines to select a predetermined gate line and provide the selected gate line with a gate signal. Level shifters are connected to the drain line driver to operate in a time-dividing manner. Each level shifter supplies the drain line driver with a boosted voltage.
摘要:
Between a positive power supply 18 and a negative power supply 19, a p-channel transistor 11 and an n-channel transistor 14 are connected in series while a p-channel transistor 12 and an n-channel transistor 15 are also connected in series. An inverted input signal *Sig1 is input to the respective gates of the transistors 11 and 14, while an input signal Sig1 is input to the respective gates of the transistors 12 and 15. As a result, of a pair of the transistors connected in series, namely either the transistors 11 and 14 or the transistors 12 and 15, when one transistor turns ON, the other transistor turns OFF. Thus, generation of through currents is prevented.
摘要:
Test data terminals R-DATA, G-DATA, and B-DATA are provided with respect to video signal lines VL-R, VL-G, and VL-B, via switches SW-R, SW-G, and SW-B, respectively. The switches SW-R, SW-G, and SW-B are turned ON by receiving an H level input signal supplied from a test terminal SW. Thus, a test of a panel is performed before an external IC is connected to the panel. When the external IC is connected to the panel, on the other hand, these terminals used for the test are fixed to an L level, thereby preventing abnormal operations.
摘要:
A semiconductor device includes a glass substrate, a heat sink formed on the glass substrate and a transistor formed on the heat sink. The transistor includes an active layer formed on the heat sink and having a source region, a channel region and a drain region. A gate electrode is placed on the channel region. In addition, the heat sink may operate as additional gate electrode.
摘要:
The present invention provides a display capable of making flicker difficult to be observed and of reducing power consumption. The display comprises first and second pixel portions including subsidiary capacitances having a first electrode which is connected to a pixel electrode and a second electrode; first and second subsidiary capacitance lines which are connected to the second electrodes of the subsidiary capacitances of the first and second pixel portions, respectively; and a signal providing circuit including a plurality of signal providing circuit portions which provide first and second signals to the first and second subsidiary capacitance lines, respectively.
摘要:
The level of a storage capacitor line changes between two types, an H level and an L level. As a result of this change, the voltage applied to a liquid crystal is shifted so that a sufficient voltage is applied to the liquid crystal to perform a display operation. Then, by changing the voltage value of the difference between a first level and a second level, the contrast and screen brightness are adjusted. Furthermore, the capacitances generated at the locations where the two storage capacitor lines and the data line intersect are set to be substantially the same.
摘要:
The present invention provides a display capable of making flicker difficult to be observed and of reducing power consumption. The display comprises first and second pixel portions including subsidiary capacitances having a first electrode which is connected to a pixel electrode and a second electrode; first and second subsidiary capacitance lines which are connected to the second electrodes of the subsidiary capacitances of the first and second pixel portions, respectively; and a signal providing circuit including a plurality of signal providing circuit portions which provide first and second signals to the first and second subsidiary capacitance lines, respectively.
摘要:
A pair of complementary clock signals are output from a level shifter, and input to first and second buffer circuits. The first and second buffer circuits are each formed of a plurality of inverters. An inverter in a first stage of one buffer circuit is provided close to the level shifter, followed by arrangement of an inverter in a first stage of the other buffer circuit.
摘要:
A pixel circuit that is connected with a scanning line and a data line includes a first transistor of which a gate electrode is connected with the scanning line and one of a source electrode and a drain electrode is connected with the data line, a second transistor of which a gate electrode is connected with the scanning line, one of a source electrode and a drain electrode is connected with the first transistor, and the other one of the source electrode and the drain electrode is connected with a first node, an auxiliary capacitor connected with a node at which the first transistor and the second transistor are connected to each other, a pixel electrode connected with the first node, a counter electrode opposed to the pixel electrode, liquid crystal held between the pixel electrode and the counter electrode, and a holding capacitor connected with the first node.
摘要:
The level of a storage capacitor line is changed between two types, an H level and an L level. As a result of this change, the voltage applied to a liquid crystal is shifted so that a sufficient voltage is applied to the liquid crystal to perform a display operation. Then, at least one of two voltage levels of the storage capacitor line is used in common with the potential of at least one of plurality of voltage levels which are used in vertical driver which drives the said selection line. Furthermore, the values of the storage capacitance and parasitic capacitance for the storage capacitor line are set within a specific range.