Active matrix display device
    1.
    发明授权
    Active matrix display device 有权
    主动矩阵显示装置

    公开(公告)号:US06989813B2

    公开(公告)日:2006-01-24

    申请号:US10011542

    申请日:2001-12-03

    IPC分类号: G09G3/36

    摘要: A low power-consumption active matrix display device including gate lines, drain lines, and pixel electrodes, which are arranged at intersections between the gate lines and the drain lines. A drain line driver is connected to the drain lines to select a drain line and provide the selected drain line with an image signal. A gate line driver is connected to the gate lines to select a predetermined gate line and provide the selected gate line with a gate signal. Level shifters are connected to the drain line driver to operate in a time-dividing manner. Each level shifter supplies the drain line driver with a boosted voltage.

    摘要翻译: 一种低功耗有源矩阵显示装置,其包括栅极线,漏极线和像素电极,其布置在栅极线和漏极线之间的交叉处。 漏极线驱动器连接到漏极线以选择漏极线并为所选择的漏极线提供图像信号。 栅极线驱动器连接到栅极线以选择预定的栅极线并且向所选择的栅极线提供栅极信号。 电平移位器连接到漏极线驱动器,以时分方式工作。 每个电平转换器为漏极线驱动器提供升压电压。

    Level shifter for use in active matrix display apparatus
    2.
    发明授权
    Level shifter for use in active matrix display apparatus 有权
    用于有源矩阵显示装置的电平移位器

    公开(公告)号:US06801181B2

    公开(公告)日:2004-10-05

    申请号:US09881113

    申请日:2001-06-14

    IPC分类号: G09G336

    CPC分类号: G09G3/3677 G09G2310/0289

    摘要: Between a positive power supply 18 and a negative power supply 19, a p-channel transistor 11 and an n-channel transistor 14 are connected in series while a p-channel transistor 12 and an n-channel transistor 15 are also connected in series. An inverted input signal *Sig1 is input to the respective gates of the transistors 11 and 14, while an input signal Sig1 is input to the respective gates of the transistors 12 and 15. As a result, of a pair of the transistors connected in series, namely either the transistors 11 and 14 or the transistors 12 and 15, when one transistor turns ON, the other transistor turns OFF. Thus, generation of through currents is prevented.

    摘要翻译: 在正电源18和负电源19之间,p沟道晶体管11和n沟道晶体管14串联连接,同时p沟道晶体管12和n沟道晶体管15串联连接。 反相输入信号* Sig1输入到晶体管11和14的各个栅极,而输入信号Sig1被输入到晶体管12和15的各个栅极。结果是,串联的一对晶体管 ,即晶体管11和14或晶体管12和15,当一个晶体管导通时,另一个晶体管截止。 因此,防止通过电流的产生。

    Display panel
    3.
    发明申请
    Display panel 审中-公开
    显示面板

    公开(公告)号:US20060114273A1

    公开(公告)日:2006-06-01

    申请号:US11288910

    申请日:2005-11-29

    IPC分类号: G09G5/10

    摘要: Test data terminals R-DATA, G-DATA, and B-DATA are provided with respect to video signal lines VL-R, VL-G, and VL-B, via switches SW-R, SW-G, and SW-B, respectively. The switches SW-R, SW-G, and SW-B are turned ON by receiving an H level input signal supplied from a test terminal SW. Thus, a test of a panel is performed before an external IC is connected to the panel. When the external IC is connected to the panel, on the other hand, these terminals used for the test are fixed to an L level, thereby preventing abnormal operations.

    摘要翻译: 通过开关SW-R,SW-G和SW-B,对视频信号线VL-R,VL-G和VL-B提供测试数据终端R-DATA,G-DATA和B-DATA , 分别。 开关SW-R,SW-G和SW-B通过接收从测试端子SW提供的H电平输入信号而导通。 因此,在外部IC连接到面板之前执行面板的测试。 另一方面,外部IC连接到面板时,用于测试的这些端子固定为L电平,从而防止异常操作。

    Semiconductor device with heat sink
    4.
    发明授权
    Semiconductor device with heat sink 失效
    带散热片的半导体器件

    公开(公告)号:US07053426B2

    公开(公告)日:2006-05-30

    申请号:US10953070

    申请日:2004-09-30

    IPC分类号: H01L29/80

    CPC分类号: H01L29/78603 H01L29/78606

    摘要: A semiconductor device includes a glass substrate, a heat sink formed on the glass substrate and a transistor formed on the heat sink. The transistor includes an active layer formed on the heat sink and having a source region, a channel region and a drain region. A gate electrode is placed on the channel region. In addition, the heat sink may operate as additional gate electrode.

    摘要翻译: 半导体器件包括玻璃衬底,形成在玻璃衬底上的散热器和形成在散热器上的晶体管。 晶体管包括形成在散热器上并具有源极区,沟道区和漏极区的有源层。 栅电极放置在沟道区上。 此外,散热器可以作为额外的栅极电极工作。

    Display
    5.
    发明申请
    Display 有权
    显示

    公开(公告)号:US20050110734A1

    公开(公告)日:2005-05-26

    申请号:US10994316

    申请日:2004-11-23

    申请人: Koji Hirosawa

    发明人: Koji Hirosawa

    IPC分类号: G02F1/133 G09G3/20 G09G3/36

    摘要: The present invention provides a display capable of making flicker difficult to be observed and of reducing power consumption. The display comprises first and second pixel portions including subsidiary capacitances having a first electrode which is connected to a pixel electrode and a second electrode; first and second subsidiary capacitance lines which are connected to the second electrodes of the subsidiary capacitances of the first and second pixel portions, respectively; and a signal providing circuit including a plurality of signal providing circuit portions which provide first and second signals to the first and second subsidiary capacitance lines, respectively.

    摘要翻译: 本发明提供能够使闪烁难以观察并且降低功耗的显示器。 显示器包括第一和第二像素部分,其包括具有连接到像素电极和第二电极的第一电极的辅助电容; 第一和第二辅助电容线,分别连接到第一和第二像素部分的辅助电容的第二电极; 以及信号提供电路,包括分别向第一和第二辅助电容线提供第一和第二信号的多个信号提供电路部分。

    Display device
    6.
    发明授权
    Display device 失效
    显示设备

    公开(公告)号:US07646370B2

    公开(公告)日:2010-01-12

    申请号:US11133882

    申请日:2005-05-20

    IPC分类号: G09G3/36

    CPC分类号: G02F1/1362

    摘要: The level of a storage capacitor line changes between two types, an H level and an L level. As a result of this change, the voltage applied to a liquid crystal is shifted so that a sufficient voltage is applied to the liquid crystal to perform a display operation. Then, by changing the voltage value of the difference between a first level and a second level, the contrast and screen brightness are adjusted. Furthermore, the capacitances generated at the locations where the two storage capacitor lines and the data line intersect are set to be substantially the same.

    摘要翻译: 存储电容线的电平在H电平和L电平两种类型之间变化。 作为这种变化的结果,施加到液晶的电压移位,使得向液晶施加足够的电压以进行显示操作。 然后,通过改变第一电平和第二电平之间的差的电压值,调整对比度和屏幕亮度。 此外,在两个存储电容线和数据线相交的位置处产生的电容被设置为基本相同。

    Liquid crystal display capable of making flicker difficult to be observed and reducing power consumption
    7.
    发明授权
    Liquid crystal display capable of making flicker difficult to be observed and reducing power consumption 有权
    能够使闪烁的液晶显示器难以观察并降低功耗

    公开(公告)号:US07532189B2

    公开(公告)日:2009-05-12

    申请号:US10994316

    申请日:2004-11-23

    申请人: Koji Hirosawa

    发明人: Koji Hirosawa

    IPC分类号: G09G3/36

    摘要: The present invention provides a display capable of making flicker difficult to be observed and of reducing power consumption. The display comprises first and second pixel portions including subsidiary capacitances having a first electrode which is connected to a pixel electrode and a second electrode; first and second subsidiary capacitance lines which are connected to the second electrodes of the subsidiary capacitances of the first and second pixel portions, respectively; and a signal providing circuit including a plurality of signal providing circuit portions which provide first and second signals to the first and second subsidiary capacitance lines, respectively.

    摘要翻译: 本发明提供能够使闪烁难以观察并且降低功耗的显示器。 显示器包括第一和第二像素部分,其包括具有连接到像素电极和第二电极的第一电极的辅助电容; 第一和第二辅助电容线,分别连接到第一和第二像素部分的辅助电容的第二电极; 以及信号提供电路,包括分别向第一和第二辅助电容线提供第一和第二信号的多个信号提供电路部分。

    Buffer circuit
    8.
    发明申请
    Buffer circuit 审中-公开
    缓冲电路

    公开(公告)号:US20060114212A1

    公开(公告)日:2006-06-01

    申请号:US11287899

    申请日:2005-11-28

    申请人: Koji Hirosawa

    发明人: Koji Hirosawa

    IPC分类号: G09G3/36

    摘要: A pair of complementary clock signals are output from a level shifter, and input to first and second buffer circuits. The first and second buffer circuits are each formed of a plurality of inverters. An inverter in a first stage of one buffer circuit is provided close to the level shifter, followed by arrangement of an inverter in a first stage of the other buffer circuit.

    摘要翻译: 一对互补时钟信号从电平移位器输出,并输入到第一和第二缓冲电路。 第一和第二缓冲电路各自由多个反相器形成。 在一个缓冲电路的第一级中的反相器设置在电平移位器附近,随后在另一个缓冲电路的第一级中布置反相器。

    PIXEL CIRCUIT, LIQUID-CRYSTAL DEVICE, AND ELECTRONIC DEVICE
    9.
    发明申请
    PIXEL CIRCUIT, LIQUID-CRYSTAL DEVICE, AND ELECTRONIC DEVICE 审中-公开
    像素电路,液晶装置和电子装置

    公开(公告)号:US20110205481A1

    公开(公告)日:2011-08-25

    申请号:US13028559

    申请日:2011-02-16

    IPC分类号: G02F1/1345

    摘要: A pixel circuit that is connected with a scanning line and a data line includes a first transistor of which a gate electrode is connected with the scanning line and one of a source electrode and a drain electrode is connected with the data line, a second transistor of which a gate electrode is connected with the scanning line, one of a source electrode and a drain electrode is connected with the first transistor, and the other one of the source electrode and the drain electrode is connected with a first node, an auxiliary capacitor connected with a node at which the first transistor and the second transistor are connected to each other, a pixel electrode connected with the first node, a counter electrode opposed to the pixel electrode, liquid crystal held between the pixel electrode and the counter electrode, and a holding capacitor connected with the first node.

    摘要翻译: 与扫描线和数据线连接的像素电路包括:第一晶体管,其栅极与扫描线连接,源电极和漏极中的一个与数据线连接;第二晶体管, 栅电极与扫描线连接,源电极和漏电极之一与第一晶体管连接,源电极和漏电极中的另一个与第一节点连接,辅助电容器连接 其中第一晶体管和第二晶体管彼此连接的节点,与第一节点连接的像素电极,与像素电极相对的对置电极,保持在像素电极和对电极之间的液晶,以及 保持电容器与第一个节点连接。

    Display device
    10.
    发明授权
    Display device 失效
    显示设备

    公开(公告)号:US07696960B2

    公开(公告)日:2010-04-13

    申请号:US11133950

    申请日:2005-05-20

    IPC分类号: G09G3/30

    CPC分类号: G02F1/1362

    摘要: The level of a storage capacitor line is changed between two types, an H level and an L level. As a result of this change, the voltage applied to a liquid crystal is shifted so that a sufficient voltage is applied to the liquid crystal to perform a display operation. Then, at least one of two voltage levels of the storage capacitor line is used in common with the potential of at least one of plurality of voltage levels which are used in vertical driver which drives the said selection line. Furthermore, the values of the storage capacitance and parasitic capacitance for the storage capacitor line are set within a specific range.

    摘要翻译: 存储电容线的电平在H电平和L电平两种类型之间变化。 作为这种变化的结果,施加到液晶的电压移位,使得向液晶施加足够的电压以进行显示操作。 然后,与用于驱动所述选择线的垂直驱动器中使用的多个电压电平中的至少一个的电位共同使用辅助电容线的两个电压电平中的至少一个。 此外,保持电容线的存储电容和寄生电容的值设定在特定范围内。