公开(公告)号：US08423876B2

公开(公告)日：2013-04-16

申请号：US12668655

申请日：2008-07-11

Applicant: Shutai Okamura ,  Yutaka Murakami ,  Masayuki Orihashi

Inventor： Shutai Okamura ,  Yutaka Murakami ,  Masayuki Orihashi

IPC: H03M13/03

CPC classification number: H03M13/118 ,  H03M13/1111 ,  H03M13/1154 ,  H03M13/23 ,  H03M13/235 ,  H03M13/6362

Abstract: It is possible to provide and an LDPC-CC (Low-Density Parity-Check Convolution Codes) encoder and an LDPC-CC decoder which performs an error correction encoding and decoding while reducing the amount of a termination sequence required for encoding/decoding the LDPC-CC encoding/decoding and suppressing degradation of the transmission efficiency. The LDPC-CC encoder (400) includes a weight control unit (470) which stores a weight pattern (475) based on an LDPC-CC inspection matrix (100); and a weight pattern (476) based on a check matrix (300) obtained by deforming an LDPC-CC inspection matrix (100). The weight control unit (470) controls a weight to be multiplied onto the outputs of a plurality of shift registers (410-1 to 410-M, 430-1 to 430-M) by using the weight pattern (475) when the input bit is an information sequence, and using a weight pattern (476) which makes a weight value to be multiplied by an inspection bit v2,t to be 0 when the input bit is a termination sequence.

Abstract translation: 可以提供LDPC-CC（低密度奇偶校验卷积码）编码器和LDPC-CC解码器，该LDPC-CC解码器在减少LDPC编码/解码所需的终止序列的量的同时进行纠错编码和解码 -CC编码/解码并抑制传输效率的降低。 LDPC-CC编码器（400）包括：权重控制单元（470），其基于LDPC-CC检查矩阵（100）存储权重模式（475）; 以及基于通过使LDPC-CC检查矩阵（100）变形而获得的校验矩阵（300）的权重模式（476）。 权重控制单元（470）通过使用加权模式（475）来控制要乘以多个移位寄存器（410-1至410-M，430-1至430-M）的输出的权重 位是信息序列，并且当输入比特是终止序列时，使用使加权值乘以检查比特v2的加权模式（476），t为0。

公开(公告)号：US08401110B2

公开(公告)日：2013-03-19

申请号：US12447885

申请日：2007-11-01

Applicant: Yutaka Murakami ,  Shutai Okamura ,  Kiyotaka Kobayashi ,  Masayuki Orihashi ,  Kazuaki Takahashi

Inventor： Yutaka Murakami ,  Shutai Okamura ,  Kiyotaka Kobayashi ,  Masayuki Orihashi ,  Kazuaki Takahashi

IPC: H04L5/12 ,  H04L23/02

CPC classification number: H04L1/0071 ,  H03M13/15 ,  H04L1/0003 ,  H04L1/0009 ,  H04L1/0059 ,  H04L1/22 ,  H04L5/0007 ,  H04L27/0008 ,  H04L27/2647 ,  H04L27/36 ,  H04L27/38

Abstract: A transmitter apparatus wherein a simple structure is used to successfully suppress the degradation of error rate performance that otherwise would be caused by fading or the like. There are included encoding parts (11—1-11—4) that encode transport data; a mapping part (3304) that performs such a mapping that encoded data sequentially formed by the encoding parts (11—1-11—4) are not successively included in the same symbol, thereby forming data symbols; and a symbol interleaver (3301) that interleaves the data symbols. In this way, a low computational complexity can be used to perform an interleaving process equivalent to a bit interleaving process to effectively improve the reception quality at a receiving end.

Abstract translation: 一种发射机装置，其中使用简单的结构来成功地抑制否则将由衰落等引起的误码率性能的降级。 包括编码传输数据的编码部分（11-1-11-4）; 执行编码由编码部分（11-1-11-4）顺序形成的数据的映射的映射部分（3304）不被连续地包括在相同的符号中，从而形成数据符号; 以及交错数据符号的符号交织器（3301）。 以这种方式，可以使用低的计算复杂度来执行等同于比特交织处理的交织处理，以有效地提高接收端的接收质量。

公开(公告)号：US08286064B2

公开(公告)日：2012-10-09

申请号：US12738621

申请日：2008-10-30

Applicant: Shutai Okamura ,  Yutaka Murakami ,  Naoya Yosoku ,  Masayuki Orihashi

Inventor： Shutai Okamura ,  Yutaka Murakami ,  Naoya Yosoku ,  Masayuki Orihashi

IPC: G06F11/00

CPC classification number: H03M13/1102 ,  H03M13/23 ,  H03M13/255 ,  H03M13/356 ,  H03M13/373 ,  H03M13/6362 ,  H04L1/005 ,  H04L1/0057 ,  H04L1/0059 ,  H04L1/0069 ,  H04L1/0071 ,  H04L1/06 ,  H04L5/0044 ,  H04L27/2626 ,  H04L27/3422

Abstract: Provided is a transmission device which improves the error rate characteristic upon decoding when performing error correction encoding by using a self-orthogonal code or an LDPC-CC in a communication system using a communication path having a fading fluctuation, multi-value modulation, or MIMO transmission. In the transmission device, the self-orthogonal encoding unit (110) encodes a self-orthogonal code having a constriction length K and an interleave unit (130) rearranges a code word sequence so that the same modulation symbol includes an information bit of a moment i and a non-correlated bit of the information bit of the moment i in a multi-value modulation unit (150).

Abstract translation: 提供一种传输装置，其在使用具有衰落波动，多值调制或MIMO的通信路径的通信系统中通过使用自正交码或LDPC-CC进行纠错编码时，提高解码时的错误率特性 传输。 在发送装置中，自正交编码单元（110）编码具有收缩长度K的自正交码和交织单元（130）重新排列码字序列，使得相同的调制符号包括一个信息位 i和多值调制单元（150）中的时刻i的信息比特的非相关比特。

公开(公告)号：US08121227B2

公开(公告)日：2012-02-21

申请号：US12882989

申请日：2010-09-15

Applicant: Yutaka Murakami ,  Kiyotaka Kobayashi ,  Masayuki Orihashi ,  Akihiko Matsuoka ,  Shutai Okamura

Inventor： Yutaka Murakami ,  Kiyotaka Kobayashi ,  Masayuki Orihashi ,  Akihiko Matsuoka ,  Shutai Okamura

IPC: H04L27/06 ,  H04L1/02

CPC classification number: H04L27/38 ,  H04B7/04 ,  H04L25/03184 ,  H04L25/067 ,  H04L2025/0342 ,  H04L2025/03426

Abstract: It is possible to demodulate a plurality of modulated signals transmitted from a plurality of antennas by using a comparatively small-size circuit with a preferable error ratio characteristic. Partial bit judgment units (509, 512) demodulates partial bits of the 64QAM-modulated signal by modifying which of the bits in the 6-bit strings constituting a symbol is to be demodulated depending on in which region of the IQ plane the reception signal point exists. This improves the partial bit error characteristic judged by the partial bit judgment units (509, 512), which in turn improves reliability of the reduced candidate signal point for use by a likelihood detection unit (518). As a result, it is possible to improve the error ratio characteristic of the final reception digital signals (322, 323).

Abstract translation: 可以通过使用具有优选误差比特性的较小尺寸的电路来解调从多个天线发送的多个调制信号。 部分位判断单元（509,512）通过根据IQ平面的哪个区域修改构成符号的6位串中的哪个位要解调64QAM调制信号的部分位，接收信号点 存在 这改善了由部分比特判断单元（509,512）判断的部分比特误差特性，这又提高了可靠性检测单元（518）使用的缩减候补信号点的可靠性。 结果，可以提高最终接收数字信号（322,323）的误差比特性。

公开(公告)号：US20100269009A1

公开(公告)日：2010-10-21

申请号：US12745216

申请日：2008-12-18

Applicant: Shutai Okamura ,  Yutaka Murakami ,  Masayuki Orihashi

Inventor： Shutai Okamura ,  Yutaka Murakami ,  Masayuki Orihashi

IPC: H03M13/05 ,  G06F11/10

CPC classification number: H03M13/255 ,  H03M13/1128 ,  H03M13/116 ,  H03M13/118 ,  H03M13/23 ,  H03M13/6362 ,  H03M13/6502 ,  H03M13/6527

Abstract: There is provided an encoder that provides a termination sequence with a simple structure for LDPC-CC encoding and reduces an amount of the termination sequence transmitted to a transmission line. The LDPC-CC encoder (200) connects a first encoder (230) to a second encoder (240) to perform encoding and thereby carry out LDPC-CC encoding, the first encoder (230) performing encoding based on an partial parity check matrix for information bits (110) obtained by extracting a sequence corresponding to the information bits in a parity check matrix (100) and the second encoder (240) performing encoding based on a partial parity check matrix for parity bits (120) obtained by extracting a sequence corresponding to the parity bits in the parity check matrix (100). A termination sequence generator (210) generates a termination sequence including the same number of bits as the memory length of the first encoder (230) and provides the generated termination sequence as an input sequence.

Abstract translation: 提供了一种编码器，其提供具有用于LDPC-CC编码的简单结构的终止序列，并减少发送到传输线的终止序列的量。 LDPC-CC编码器（200）将第一编码器（230）连接到第二编码器（240）以执行编码，从而执行LDPC-CC编码，第一编码器（230）基于部分奇偶校验矩阵执行编码， 通过提取与奇偶校验矩阵（100）中的信息比特相对应的序列获得的信息比特（110）和基于通过提取序列获得的奇偶校验比特（120）的部分奇偶校验矩阵执行编码的第二编码器（240） 对应于奇偶校验矩阵（100）中的奇偶校验位。 终止序列生成器（210）生成包括与第一编码器（230）的存储器长度相同数量的位的终止序列，并且将生成的终止序列提供为输入序列。

公开(公告)号：US20100192047A1

公开(公告)日：2010-07-29

申请号：US12668829

申请日：2008-07-11

Applicant: Yutaka Murakami ,  Shutai Okamura ,  Masayuki Orihashi

Inventor： Yutaka Murakami ,  Shutai Okamura ,  Masayuki Orihashi

IPC: H03M13/03 ,  G06F11/00

CPC classification number: H04L1/0057 ,  H03M13/1111 ,  H03M13/235 ,  H03M13/2707 ,  H03M13/353 ,  H03M13/6306 ,  H04L1/0059 ,  H04L1/1812 ,  H04L5/0007 ,  H04L5/0042

Abstract: A transmitting device and method enabling improvement of the reception quality on the receiving side when the LDPC-CC (Low-Density Parity-Check Convolutional Codes) encoding is used. The transmitting device (100) comprises an LDPC-CC encoding section (102), a sorting section (121) for sorting the encoded data (120) acquired by the LDPC-CC encoding section (102) into a first encoded data set (103_A) corresponding to the column number of the column containing “1” in a part of an LDPC-CC check matrix H from which a protograph is excluded and a second encoded data set (103_B) corresponding to the column numbers of the columns other than that, and a frame constructing section (a control section (106)) for constructing a transmission frame where the first and second encoded data sets (103_A, 103_B) are arranged in positions different in time or frequency in the transmission frame.

Abstract translation: 当使用LDPC-CC（低密度奇偶校验卷积码）编码时，能够提高接收侧的接收质量的发送装置和方法。 发送设备（100）包括LDPC-CC编码部分（102），用于将由LDPC-CC编码部分（102）获取的编码数据（120）分类为第一编码数据集（103_A）的排序部分 ）对应于从其排除原型图的LDPC-CC校验矩阵H的一部分中包含“1”的列的列号，以及对应于除此之外的列的列号的第二编码数据集（103_B） ，以及用于构造传输帧的帧构造部（控制部（106）），其中第一和第二编码数据集（103_A，103_B）被布置在传输帧中的时间或频率不同的位置。

公开(公告)号：US20100172421A1

公开(公告)日：2010-07-08

申请号：US12294804

申请日：2007-03-30

Applicant: Shutai Okamura ,  Masayuki Orihashi ,  Takaaki Kishigami ,  Yutaka Murakami

Inventor： Shutai Okamura ,  Masayuki Orihashi ,  Takaaki Kishigami ,  Yutaka Murakami

IPC: H04L27/28 ,  H04L27/06

CPC classification number: H04B7/04 ,  H04B7/0697 ,  H04B7/0854 ,  H04L1/0625 ,  H04L1/0631 ,  H04L1/0643

Abstract: An MIMO receiver and MIMO communication system which can have a small hardware scale even if the number of antennas used for MIMO communication. In a radio communication device (200), a receiving section (220) receives a spatially multiplexed signal generated by mutually-different and spatially multiplexing transmission signals, a first signal demultiplexing section (230) subjects a linear operation to the received spatial multiplexed signal to demultiplex the spatial multiplexed signal, and a second signal demultiplexing section (240) demultiplexer the demultiplexed spatially multiplexed signal into the transmission signals. When the received signal is demultiplexed by a single demultiplexing, as the number of multiplexed spatial multiplexed signal increases, the demultiplexer becomes complicated, and the hardware scale increases. When the received signal is demultiplexed by a plurality of demultiplexings, the hardware scale is relatively small.

Abstract translation: 即使用于MIMO通信的天线数量，MIMO接收机和MIMO通信系统也可以具有小的硬件规模。 在无线通信装置（200）中，接收部（220）接收通过相互不同的空间复用的发送信号生成的空间复用信号，第一信号解复用部（230）对所接收的空间复用信号进行线性运算 解复用空间多路复用信号，第二信号解复用部分（240）将解复用的空间多路复用信号解复用为传输信号。 当接收到的信号被单解复用解复用时，随着多路复用信号的复用信号数量的增加，解复用器变得复杂，硬件规模增大。 当接收到的信号被多路解复用时，硬件比例相对较小。

公开(公告)号：US08219865B2

公开(公告)日：2012-07-10

申请号：US13190158

申请日：2011-07-25

Applicant: Yutaka Murakami ,  Shutai Okamura ,  Kiyotaka Kobayashi ,  Masayuki Orihashi

Inventor： Yutaka Murakami ,  Shutai Okamura ,  Kiyotaka Kobayashi ,  Masayuki Orihashi

IPC: H03M13/00 ,  G06F11/00

CPC classification number: H04L1/0041 ,  H03M13/13 ,  H03M13/255 ,  H03M13/2721 ,  H03M13/2909 ,  H04L1/0003 ,  H04L1/0057 ,  H04L1/0071 ,  H04L1/0656 ,  H04L5/0023

Abstract: A transmitter apparatus wherein a relatively simple structure is used to suppress burst errors without changing the block sizes of encoded blocks even when the number of modulation multi-values is increased. An encoding part subjects transport data to a block encoding process to form block encoded data. A modulating part modulates the block encoded data to form data symbols; and an arranging (interleaving) part arranges (interleaves) the block encoded data in such a manner that the intra-block encoded data of the encoded blocks, which include their respective single different data symbol, get together, and then supplies the arranged (interleaved) block encoded data to the modulating part. In this way, there can be provided a transmitter apparatus wherein a relatively simple structure is used to suppress burst errors without changing the block sizes of encoded blocks even when the number of modulation multi-values is increased.

Abstract translation: 一种发射机装置，即使当调制多值的数量增加时，使用相对简单的结构来抑制突发错误，而不改变编码块的块大小。 编码部分将传输数据转移到块编码处理以形成块编码数据。 调制部分调制块编码数据以形成数据符号; 并且排列（交织）部分以这样的方式布置（交织）块编码数据，使得包括它们各自的单个不同数据符号的编码块的块内编码数据在一起，然后提供所安排的（交织的 ）块编码数据到调制部分。 以这种方式，可以提供一种发射机装置，即使当调制多值的数量增加时，使用相对简单的结构来抑制突发错误，而不改变编码块的块大小。

公开(公告)号：US08010858B2

公开(公告)日：2011-08-30

申请号：US12688658

申请日：2010-01-15

Applicant: Yutaka Murakami ,  Shutai Okamura ,  Kiyotaka Kobayashi ,  Masayuki Orihashi

Inventor： Yutaka Murakami ,  Shutai Okamura ,  Kiyotaka Kobayashi ,  Masayuki Orihashi

IPC: G06F11/00 ,  H03M13/00

CPC classification number: H04L1/0041 ,  H03M13/13 ,  H03M13/255 ,  H03M13/2721 ,  H03M13/2909 ,  H04L1/0003 ,  H04L1/0057 ,  H04L1/0071 ,  H04L1/0656 ,  H04L5/0023

Abstract: A transmitter apparatus wherein a relatively simple structure is used to suppress burst errors without changing the block sizes of encoded blocks even when the number of modulation multi-values is increased. An encoding part subjects transport data to a block encoding process to form block encoded data. A modulating part modulates the block encoded data to form data symbols; and an arranging (interleaving) part arranges(interleaves) the block encoded data in such a manner that the intra-block encoded data of the encoded blocks, which include their respective single different data symbol, get together, and then supplies the arranged(interleaved) block encoded data to the modulating part. In this way, there can be provided a transmitter apparatus wherein a relatively simple structure is used to suppress burst errors without changing the block sizes of encoded blocks even when the number of modulation multi-values is increased.

Abstract translation: 一种发射机装置，即使当调制多值的数量增加时，使用相对简单的结构来抑制突发错误，而不改变编码块的块大小。 编码部分将传输数据转移到块编码处理以形成块编码数据。 调制部分调制块编码数据以形成数据符号; 并且排列（交织）部分以这样的方式布置（交织）块编码数据，使得包括它们各自的单个不同数据符号的编码块的块内编码数据在一起，然后提供所安排的（交织的 ）块编码数据到调制部分。 以这种方式，可以提供一种发射机装置，即使当调制多值的数量增加时，使用相对简单的结构来抑制突发错误，而不改变编码块的块大小。

公开(公告)号：US20110138258A1

公开(公告)日：2011-06-09

申请号：US12674896

申请日：2008-08-29

Applicant: Shutai Okamura ,  Yutaka Murakami ,  Masayuki Orihashi

Inventor： Shutai Okamura ,  Yutaka Murakami ,  Masayuki Orihashi

IPC: H03M13/05 ,  G06F11/10 ,  H03M13/45

CPC classification number: H03M13/2957 ,  H03M13/1102 ,  H03M13/116 ,  H03M13/118 ,  H03M13/1185 ,  H03M13/23 ,  H03M13/6356 ,  H03M13/6362 ,  H03M13/6527

Abstract: An encoding device and decoding device for improving an error floor while taking advantage of the features of a convolutional code capable of encoding/decoding an information sequence with an arbitrary length are disclosed. An error correction encoding section (110) is provided with an LDPC-CC encoder (111) and an LDPC-BC encoder (112). The LDPC-CC encoder (111) acquires an LDPC-CC code word sequence by applying LDPC-CC encoding to a transmission information sequence. The LDPC-BC encoder (112) acquires a parity sequence by applying LDPC-BC encoding to the LDPC-CC code word sequence. The LDPC-CC encoder (111) further applies the LDPC-CC encoding to the parity sequence.

Abstract translation: 公开了一种编码装置和解码装置，用于在利用能够对任意长度的信息序列进行编码/解码的卷积码的特征的同时，改善错误帧。 纠错编码部分（110）具有LDPC-CC编码器（111）和LDPC-BC编码器（112）。 LDPC-CC编码器（111）通过对发送信息序列应用LDPC-CC编码来获取LDPC-CC码字序列。 LDPC-BC编码器（112）通过对LDPC-CC码字序列应用LDPC-BC编码来获取奇偶校验序列。 LDPC-CC编码器（111）还将LDPC-CC编码应用于奇偶校验序列。