公开(公告)号：US06777774B2

公开(公告)日：2004-08-17

申请号：US10125244

申请日：2002-04-17

申请人： Sia Choon Beng ,  Yeo Kiat Seng ,  Sanford Chu ,  Lap Chan ,  Chew Kok-Wai

发明人： Sia Choon Beng ,  Yeo Kiat Seng ,  Sanford Chu ,  Lap Chan ,  Chew Kok-Wai

IPC分类号： H01L2900

CPC分类号： H01L28/10 ,  H01L23/552 ,  H01L27/08 ,  H01L2924/0002 ,  H01L2924/00

摘要： A novel complimentary shielded inductor on a semiconductor is disclosed. A region of electrically floating high resistive material is deposited between the inductor and the semiconductor substrate. The high resistive shield is patterned with a number of gaps, such that a current induced in the shield by the inductor does not have a closed loop path. The high resistive floating shield compliments a grounded low resistive shield to achieve higher performance inductors. In this fashion, noise in the substrate is reduced. The novel complimentary shield does not significantly degrade the figures of merit of the inductor, such as, quality factor and resonance frequency. In one embodiment, the grounded shield is made of patterned N-well (or P-well) structures. In still another embodiment, the low resistive electrically grounded shield is made of patterned Silicide, which may be formed on portions of the substrate itself.

摘要翻译： 公开了一种半导体上的新型有用屏蔽电感器。 电浮动高电阻材料的区域沉积在电感器和半导体衬底之间。 高电阻屏蔽层被图案化为多个间隙，使得由电感器在屏蔽层中感应的电流不具有闭环路径。 高电阻浮动屏蔽补充了接地的低电阻屏蔽以实现更高性能的电感器。 以这种方式，衬底中的噪声降低。 新型互补屏蔽不会显着降低电感器的品质因数，如品质因数和谐振频率。 在一个实施例中，接地屏蔽由图案化的N阱（或P阱）结构制成。 在另一个实施例中，低电阻电接地屏蔽由图案化的硅化物制成，其可以形成在衬底本身的部分上。