公开(公告)号：US09372210B1

公开(公告)日：2016-06-21

申请号：US14311124

申请日：2014-06-20

申请人： Silego Technology, Inc.

发明人： John Othniel McDonald ,  Jay Li ,  Nathan Willis John

IPC分类号： H03K3/012 ,  G01R19/00

CPC分类号： G01R19/0092 ,  G01R19/25 ,  H03K3/012 ,  H03K17/122

摘要： Various techniques for dynamic power FET switching are disclosed. In some embodiments, a device comprises an array of two or more independently switchable power MOSFETs that are configured to sense current in a high current mode and a low current mode as well as circuitry for automatically switching from the low current mode to the high current mode when sensed current is above a threshold to switch to the high current mode.

摘要翻译： 公开了用于动态功率FET切换的各种技术。 在一些实施例中，器件包括两个或更多个可独立切换的功率MOSFET的阵列，其被配置为以高电流模式和低电流模式感测电流，以及用于从低电流模式自动切换到高电流模式的电路 当感测到的电流高于阈值以切换到高电流模式时。

公开(公告)号：US11012055B2

公开(公告)日：2021-05-18

申请号：US16415054

申请日：2019-05-17

申请人： Silego Technology Inc.

发明人： Vikas Vinayak ,  David Kuneth Chow ,  Nathan Willis John ,  Sidney Chan

IPC分类号： H03K3/0233 ,  H03K5/1534 ,  H02M1/08 ,  H02M3/158 ,  H03K19/20 ,  H03K5/00

摘要： A comparator system and a method for comparing an input signal and a reference signal are presented. The system has a controller to adjust a rising output delay and/or a falling output delay of a system output signal. The system output signal is dependent on the comparison between the input signal and the reference signal. This system provides a more efficient comparator with reduced power consumption whilst still providing the required rising output delay and falling output delay for a given application. Techniques used in prior art will always resort to running the comparators at a speed that supports the speed requirements in the worst case conditions and does not exploit any asymmetries in the required rising output delay and falling output delay for a given application. When these asymmetries are exploited, further increases in power efficiency can be achieved.

公开(公告)号：US10298406B1

公开(公告)日：2019-05-21

申请号：US15169206

申请日：2016-05-31

申请人： Silego Technology, Inc.

发明人： John Othniel McDonald ,  Nathan Willis John ,  David Kun-Teh Chow

IPC分类号： H04L9/32

摘要： A security integrated circuit is disclosed. In some embodiments, the security integrated circuit comprises metal configured memory that stores a first portion of each of a plurality of keys, programmable memory that stores a second portion of each of the plurality of keys, and an interface for connecting to an external authentication system. The metal configured memory and programmable memory store a prescribed finite number of host keys and matching device keys. In response to a received host key from the external authentication system, a matching device key is provided by the security integrated circuit.