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公开(公告)号：US20240170577A1
公开(公告)日：2024-05-23
申请号：US18551104
申请日：2022-03-17
申请人： Soitec
IPC分类号： H01L29/786 , H01L21/762
CPC分类号： H01L29/78603 , H01L21/76254
摘要： An NCFET transistor comprises a semiconductor-on-insulator substrate for a field-effect transistor, and the NCFET transistor successively comprises, from its base to its surface: a semiconductor carrier substrate; a single ferroelectric layer, arranged in direct contact with the carrier substrate, which layer is designed to be biased so as to form a negative capacitance; and an active layer of a semiconductor material, which layer is designed to form the channel of the transistor, and is arranged in direct contact with the ferroelectric layer. The NCFET transistor further comprises a channel that is arranged in the active layer, a source and a drain that are arranged in the active layer on either side of the channel, and a gate that is arranged on the channel and is insulated from the channel by a gate dielectric.
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公开(公告)号：US20240145314A1
公开(公告)日：2024-05-02
申请号：US18402215
申请日：2024-01-02
申请人： Soitec
IPC分类号： H01L21/8238 , H01L21/324 , H01L21/762
CPC分类号： H01L21/823821 , H01L21/3247 , H01L21/7624
摘要： A method for manufacturing a CFET device comprises forming a substrate of the double semi-conductor on insulator type, successively comprising, from the base to the surface thereof: a carrier substrate, a first electrically insulating layer, a first single-crystal semiconductor layer, a second electrically insulating layer and a second single-crystal semiconductor layer. Slices are formed into the substrate to the first electrically insulating layer so as to form at least one fin (F). A channel of a first transistor is formed in the first semiconductor layer and a channel of a second transistor is formed opposite the first transistor in the second semiconductor layer. Formation of the substrate of the double semi-conductor on insulator type comprises: a first and a second step of transferring a layer and thermal processing at a temperature that is sufficiently high to smooth the first single-crystal semiconductor layer to a roughness lower than 0.1 nm RMS.
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公开(公告)号：US11469367B2
公开(公告)日：2022-10-11
申请号：US17043456
申请日：2019-03-22
申请人： Soitec
IPC分类号： H01L21/30 , H01L41/335 , H01L41/27 , H01L41/312 , H01L45/00
摘要： A method for separating a removable composite structure using a light flux includes supplying the removable composite structure, which successively comprises: a substrate that is transparent to the light flux; an optically absorbent layer for at least partially absorbing a light flux; a sacrificial layer adapted to dissociate subject to the application of a temperature higher than a dissociation temperature and made of a material different from that of the optically absorbent layer; and at least one layer to be separated. The method further includes applying a light flux through the substrate, the light flux being at least partly absorbed by the optically absorbent layer, so as to heat the optically absorbent layer; heating the sacrificial layer by thermal conduction from the optically absorbent layer, up to a temperature that is greater than or equal to the dissociation temperature; and dissociating the sacrificial layer under the effect of the heating.
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公开(公告)号：US20210028348A1
公开(公告)日：2021-01-28
申请号：US17043456
申请日：2019-03-22
申请人： Soitec
IPC分类号： H01L41/335 , H01L41/27 , H01L41/312 , H01L45/00
摘要： A method for separating a removable composite structure using a light flux includes supplying the removable composite structure, which successively comprises: a substrate that is transparent to the light flux; an optically absorbent layer for at least partially absorbing a light flux; a sacrificial layer adapted to dissociate subject to the application of a temperature higher than a dissociation temperature and made of a material different from that of the optically absorbent layer; and at least one layer to be separated. The method further includes applying a light flux through the substrate, the light flux being at least partly absorbed by the optically absorbent layer, so as to heat the optically absorbent layer; heating the sacrificial layer by thermal conduction from the optically absorbent layer, up to a temperature that is greater than or equal to the dissociation temperature; and dissociating the sacrificial layer under the effect of the heating.
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公开(公告)号：US11876020B2
公开(公告)日：2024-01-16
申请号：US17250767
申请日：2019-09-03
申请人： Soitec
IPC分类号： H01L21/762 , H01L21/8238 , H01L21/324
CPC分类号： H01L21/823821 , H01L21/3247 , H01L21/7624
摘要： A method for manufacturing a CFET device comprises forming a substrate of the double semi-conductor on insulator type, successively comprising, from the base to the surface thereof: a carrier substrate, a first electrically insulating layer, a first single-crystal semiconductor layer, a second electrically insulating layer and a second single-crystal semiconductor layer. Slices are formed into the substrate to the first electrically insulating layer so as to form at least one fin (F). A channel of a first transistor is formed in the first semiconductor layer and a channel of a second transistor is formed opposite the first transistor in the second semiconductor layer. Formation of the substrate of the double semi-conductor on insulator type comprises: a first and a second step of transferring a layer and thermal processing at a temperature that is sufficiently high to smooth the first single-crystal semiconductor layer to a roughness lower than 0.1 nm RMS.
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公开(公告)号：US20210202326A1
公开(公告)日：2021-07-01
申请号：US17250767
申请日：2019-09-03
申请人： Soitec
IPC分类号： H01L21/8238 , H01L21/762 , H01L21/324
摘要： A method for manufacturing a CFET device comprises forming a substrate of the double semi-conductor on insulator type, successively comprising, from the base to the surface thereof: a carrier substrate, a first electrically insulating layer, a first single-crystal semiconductor layer, a second electrically insulating layer and a second single-crystal semiconductor layer. Slices are formed into the substrate to the first electrically insulating layer so as to form at least one fin (F). A channel of a first transistor is formed in the first semiconductor layer and a channel of a second transistor is formed opposite the first transistor in the second semiconductor layer. Formation of the substrate of the double semi-conductor on insulator type, comprises: a first and a second step of transferring a layer and thermal processing at a temperature that is sufficiently high to smooth the first single-crystal semiconductor layer to a roughness lower than 0.1 nm RMS.
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