公开(公告)号：US09698063B2

公开(公告)日：2017-07-04

申请号：US14381537

申请日：2013-02-18

Applicant: Soitec

Inventor： Patrick Reynaud ,  Walter Schwarzenbach ,  Konstantin Bourdelle ,  Jean-Francois Gilbert

IPC: H01L21/66 ,  G01R31/26

CPC classification number: H01L22/14 ,  G01R31/2601 ,  H01L22/20

Abstract: The invention concerns a method of testing a semiconductor-on-insulator type structure comprising a support substrate, a dielectric layer having a thickness of less than 50 nm and a semiconductor layer, the structure comprising a bonding interface between the dielectric layer and the support substrate or the semiconductor layer or inside the dielectric layer, characterized in that it comprises measuring the charge to breakdown (QBD) of the dielectric layer and in that information is deduced from the measurement relating to the hydrogen concentration in the layer and/or at the bonding interface. The invention also concerns a method of fabricating a batch of semiconductor-on-insulator type structures including carrying out the test on a sample structure from the batch.

公开(公告)号：US20150014822A1

公开(公告)日：2015-01-15

申请号：US14381537

申请日：2013-02-18

Applicant: Soitec

Inventor： Patrick Reynaud ,  Walter Schwarzenbach ,  Konstantin Bourdelle ,  Jean-Francois Gilbert

IPC: H01L21/66 ,  G01R31/26

CPC classification number: H01L22/14 ,  G01R31/2601 ,  H01L22/20

Abstract: The invention concerns a method of testing a semiconductor on insulator type structure comprising a support substrate, a dielectric layer having a thickness of less than 50 nm and a semiconductor layer, the structure comprising a bonding interface between the dielectric layer and the support substrate or the semiconductor layer or inside the dielectric layer, characterized in that it comprises measuring the charge to breakdown (QBD) of the dielectric layer and in that information is deduced from the measurement relating to the hydrogen concentration in the layer and/or at the bonding interface. The invention also concerns a method of fabricating a batch of semiconductor on insulator type structures including carrying out the test on a sample structure from the batch.

Abstract translation: 本发明涉及一种测试半导体绝缘体类型结构的方法，包括支撑衬底，厚度小于50nm的电介质层和半导体层，该结构包括介电层和支撑衬底之间的接合界面或 半导体层或电介质层内部，其特征在于，其包括测量电介质层的电荷（QBD），并且从与层中和/或接合界面处的氢浓度相关的测量推导出信息。 本发明还涉及制造一批半导体绝缘体型结构的方法，包括对来自批料的样品结构进行测试。