公开(公告)号：US20150156433A1

公开(公告)日：2015-06-04

申请号：US14616036

申请日：2015-02-06

Applicant: Sony Corporation

Inventor： Shinya Nomura ,  Yoshiaki Urakawa ,  Youji Sakioka

IPC: H04N5/369 ,  H04N5/3745 ,  H04N5/378

CPC classification number: H04N5/3698 ,  H04N5/3454 ,  H04N5/3745 ,  H04N5/37455 ,  H04N5/376 ,  H04N5/378

Abstract: A semiconductor device includes: an element array portion in which unit elements are disposed in a matrix; and a signal processing portion including a signal processing circuit executing predetermined signal processing based on unit signals outputted from the circuit elements, respectively, every column, in which a function of the signal processing circuit is controlled in such a way that power consumption of the signal processing circuit concerned corresponding to the unit elements each not required becomes lower in a phase of an element selection mode in which only information on a part of the unit pixels for one row in the element array portion is required than in a phase of a normal operation mode.

Abstract translation: 半导体器件包括：元件阵列部分，其中单元元件设置在矩阵中; 以及信号处理部分，其包括信号处理电路，分别基于从电路元件输出的每个列执行预定信号处理，其中信号处理电路的功能被控制为使得信号的功率消耗 相对于不需要的单元的各个处理电路在元件选择模式的相位中变得较低，其中仅需要元件阵列部分中的一行的单位像素的一部分的信息，而不是正常操作的相位 模式。

公开(公告)号：US09398238B2

公开(公告)日：2016-07-19

申请号：US14616036

申请日：2015-02-06

Applicant: Sony Corporation

Inventor： Shinya Nomura ,  Yoshiaki Urakawa ,  Youji Sakioka

IPC: H04N5/376 ,  H04N5/369 ,  H04N5/345 ,  H04N5/3745 ,  H04N5/378

CPC classification number: H04N5/3698 ,  H04N5/3454 ,  H04N5/3745 ,  H04N5/37455 ,  H04N5/376 ,  H04N5/378

Abstract: A semiconductor device includes: an element array portion in which unit elements are disposed in a matrix; and a signal processing portion including a signal processing circuit executing predetermined signal processing based on unit signals outputted from the circuit elements, respectively, every column, in which a function of the signal processing circuit is controlled in such a way that power consumption of the signal processing circuit concerned corresponding to the unit elements each not required becomes lower in a phase of an element selection mode in which only information on a part of the unit pixels for one row in the element array portion is required than in a phase of a normal operation mode.