-
公开(公告)号:US20160276347A1
公开(公告)日:2016-09-22
申请号:US15024347
申请日:2013-12-16
申请人: Stephen M. CEA , Roza KOTLYAR , Harold W. KENNEL , Kelin J. KUHN , Tahir GHANI
发明人: STEPHEN M CEA , ROZA KOTLYAR , HAROLD W KENNEL , KELIN J KUHN , TAHIR GHANI
IPC分类号: H01L27/092 , H01L21/8238 , H01L29/04 , H01L29/78
CPC分类号: H01L27/0924 , H01L21/823807 , H01L21/823821 , H01L29/045 , H01L29/1054 , H01L29/66795 , H01L29/7842 , H01L29/785
摘要: Techniques and methods related to dual strained cladding layers for semiconductor devices, and systems incorporating such semiconductor devices.
摘要翻译: 与用于半导体器件的双应变包覆层有关的技术和方法以及包含这种半导体器件的系统。
-
2.
公开(公告)号:US20160351701A1
公开(公告)日:2016-12-01
申请号:US15117590
申请日:2014-03-27
申请人: STEPHEN M. CEA , ROZA KOTLYAR , HAROLD W. KENNEL , GLENN A. GLASS , ANAND S. MURTHY , WILLY RACHMADY , TAHIR GHANI
发明人: STEPHEN M. CEA , ROZA KOTLYAR , HAROLD W. KENNEL , GLENN A. GLASS , ANAND S. MURTHY , WILLY RACHMADY , TAHIR GHANI
IPC分类号: H01L29/78 , H01L29/161 , H01L27/092 , H01L29/04 , H01L29/06 , H01L29/10 , H01L29/66
CPC分类号: H01L29/785 , H01L27/0924 , H01L29/045 , H01L29/0649 , H01L29/1054 , H01L29/161 , H01L29/165 , H01L29/66545 , H01L29/66818
摘要: Techniques are disclosed for incorporating high mobility strained channels into fin-based NMOS transistors (e.g., FinFETs such as double-gate, trigate, etc), wherein a stress material is cladded onto the channel area of the fin. In one example embodiment, a germanium or silicon germanium film is cladded onto silicon fins in order to provide a desired tensile strain in the core of the fin, although other fin and cladding materials can be used. The techniques are compatible with typical process flows, and cladding deposition can occur at a plurality of locations within typical process flow. In various embodiments, fins may be formed with a minimum width (or later thinned) so as to improve transistor performance. In some embodiments, a thinned fin also increases tensile strain across the core of a cladded fin. In some cases, strain in the core may be further enhanced by adding an embedded silicon epitaxial source and drain.
摘要翻译: 公开了用于将高迁移率应变通道并入翅片式NMOS晶体管(例如,诸如双栅极,触发器等的FinFET)中的技术,其中应力材料被包覆到鳍片的沟道区域上。 在一个示例性实施例中,锗或硅锗膜被包覆在硅散热片上,以便在散热片的芯中提供期望的拉伸应变,尽管可以使用其它鳍和包层材料。 这些技术与典型的工艺流程兼容,并且在典型工艺流程中的多个位置处可以发生熔覆沉积。 在各种实施例中,可以以最小宽度(或稍后变薄)形成翅片,以便提高晶体管性能。 在一些实施例中,变薄的翅片也增加穿过包覆翅片的芯的拉伸应变。 在一些情况下,通过添加嵌入式硅外延源和漏极可以进一步增强芯中的应变。
-