公开(公告)号：US5744990A

公开(公告)日：1998-04-28

申请号：US555369

申请日：1995-11-08

Applicant: Steven Burstein ,  Sharif M. Ibrahim

Inventor： Steven Burstein ,  Sharif M. Ibrahim

IPC: H03K17/22

CPC classification number: H03K17/223

Abstract: A comprehensive power-on-reset (POR) and low voltage detection circuit combines a Power Supply Voltage Level Detection (PSVLD) circuit with an Enhanced Retriggering (ER) circuit. The PSVLD circuit establishes lower and upper thresholds of the desired operating voltage range, and provide initial POR triggering and retriggering when the supply voltage is within the desired range. The ER circuit senses a predetermined amount of drop in the power supply voltage being monitored, and generates an independent pulse at the POR node whenever such a drop occurs. Total DC current is limited to less than 2.5 microamps, while power supply voltages can be monitored for stability over the range of 2.5 to 5.5 volts.

Abstract translation: 综合上电复位（POR）和低电压检测电路将电源电压电平检测（PSVLD）电路与增强型重触发（ER）电路相结合。 PSVLD电路建立所需工作电压范围的较低和较高阈值，并在电源电压在所需范围内时提供初始POR触发和重新触发。 ER电路检测到被监视的电源电压的预定量的下降，并且在发生这种下降时在POR节点处产生独立的脉冲。 总直流电流被限制在小于2.5微安，而电源电压可以在2.5至5.5伏的范围内监测稳定性。

公开(公告)号：US5826105A

公开(公告)日：1998-10-20

申请号：US661128

申请日：1996-06-10

Applicant: Steven Burstein ,  Kenneth George Smalley ,  Ian Fraser Harris

Inventor： Steven Burstein ,  Kenneth George Smalley ,  Ian Fraser Harris

IPC: G06F13/12 ,  G06F13/00

CPC classification number: G06F13/124

Abstract: A method is disclosed for giving a host CPU direct access to the address space of an embedded microprocessor in a multifunction controller. The data path of the multifunction controller chip is modified to enable this direct access.

Abstract translation: 公开了一种用于使主机CPU直接访问多功能控制器中的嵌入式微处理器的地址空间的方法。 多功能控制器芯片的数据路径被修改以使得能够直接访问。

公开(公告)号：US5847586A

公开(公告)日：1998-12-08

申请号：US741741

申请日：1996-10-31

Applicant: Steven Burstein ,  Sharif M. Ibrahim

Inventor： Steven Burstein ,  Sharif M. Ibrahim

IPC: H03K17/22

CPC classification number: H03K17/223

Abstract: A comprehensive power-on-reset (POR) and low voltage detection circuit combines a Power Supply Voltage Level Detection (PSVLD) circuit with an Enhanced Retriggering (ER) circuit. The PSVLD circuit establishes lower and upper thresholds of the desired operating voltage range, and provides initial POR triggering and retriggering when the supply voltage is within the desired range. The ER circuit senses a predetermined amount of drop in the power supply voltage being monitored, and generates an independent pulse at the POR node whenever such a drop occurs. Total DC current is limited to less than 2.5 microamps, while power supply voltages can be monitored over the range of 2.5 to 5.5 volts. A simplified POR and low voltage detection circuit establishes a single threshold and generates an initial POR signal when the supply voltage exceeds this threshold. The low voltage detection circuit causes a retrigger POR signal to be generated if the supply voltage then falls below this threshold. Total DC current is limited to less than 12 microamps, while power supply voltages can be monitored over the range of 2.5 to 5.5 volts.

Abstract translation: 综合上电复位（POR）和低电压检测电路将电源电压电平检测（PSVLD）电路与增强型重触发（ER）电路相结合。 PSVLD电路建立所需工作电压范围的较低和较高阈值，并在电源电压在所需范围内时提供初始POR触发和重新触发。 ER电路检测到被监视的电源电压的预定量的下降，并且在发生这种下降时在POR节点处产生独立的脉冲。 总直流电流限制在小于2.5微安，而电源电压可以在2.5至5.5伏范围内进行监控。 简化的POR和低电压检测电路建立单个阈值，并在电源电压超过此阈值时产生初始POR信号。 如果电源电压下降到该阈值以下，则低电压检测电路会产生再触发器POR信号。 总直流电流限制在小于12微安，而电源电压可以在2.5至5.5伏范围内进行监控。

公开(公告)号：US4629908A

公开(公告)日：1986-12-16

申请号：US702480

申请日：1985-02-19

Applicant: Ronald S. Ethe ,  Steven Burstein

Inventor： Ronald S. Ethe ,  Steven Burstein

IPC: H03K3/355 ,  H03K5/1534

CPC classification number: H03K3/355 ,  H03K5/1534

Abstract: A monostable multivibrator includes a pair of MOSFETS (34, 42) electrically coupled to an input node (12) and a MOS logic gate which has one input coupled to this node and another input adapted to receive a delayed signal from another node (38). The MOSFETS are configured to hold node 38 at ground and keep the input MOSFET of the logic gate electrically isolated from the means used to generate the delayed signal thereby enabling the output MOSFET of the logic gate to charge its output efficiently with respect to time.

Abstract translation: 单稳态多谐振荡器包括电耦合到输入节点（12）的一对MOSFET（34,42）和耦合到该节点的一个输入的MOS逻辑门，以及适于从另一个节点（38）接收延迟的信号的另一输入端， 。 MOSFETS被配置为将节点38保持在地，并保持逻辑门的输入MOSFET与用于产生延迟信号的装置电隔离，从而使得逻辑门的输出MOSFET相对于时间有效地对其输出进行充电。

公开(公告)号：US20100207596A1

公开(公告)日：2010-08-19

申请号：US12371375

申请日：2009-02-13

Applicant: Jane Xu ,  Steven Burstein ,  Jay D. Popper

Inventor： Jane Xu ,  Steven Burstein ,  Jay D. Popper

IPC: G05F5/00

CPC classification number: H03K17/223

Abstract: An input protection circuit (IPC) may prevent an input signal from propagating into a system, such as an integrated circuit (IC), when the voltage level of the input signal exceeds a specified value. The IPC may be configured to compare the input signal voltage, which may be that of an external input signal received by the system, with a reference voltage, which may be the power supply voltage. If the input signal voltage exceeds the reference voltage, the output of the IPC may be set to the value of a specified clamp voltage. If the input signal voltage does not exceed the reference voltage, the output of the IPC may track (or follow) the input signal voltage. For certain integrated circuits, the IPC may be configured to provide circuit protection for an input signal voltage ranging between 0V to 5V, and a power supply voltage ranging between 3.0V and 3.6V.

Abstract translation: 当输入信号的电压电平超过指定值时，输入保护电路（IPC）可以防止输入信号传播到诸如集成电路（IC）的系统中。 IPC可以被配置为将输入信号电压（其可以是系统接收的外部输入信号的电压）与可以是电源电压的参考电压进行比较。 如果输入信号电压超过参考电压，则IPC的输出可以设置为指定钳位电压的值。 如果输入信号电压不超过参考电压，则IPC的输出可以跟踪（或跟随）输入信号电压。 对于某些集成电路，IPC可以配置为为0V至5V之间的输入信号电压和3.0V至3.6V之间的电源电压提供电路保护。

公开(公告)号：US06885243B2

公开(公告)日：2005-04-26

申请号：US10452697

申请日：2003-06-02

Applicant: Steven Burstein ,  Len Bekker ,  Jay D. Popper

Inventor： Steven Burstein ,  Len Bekker ,  Jay D. Popper

IPC: G06F1/26 ,  G06F9/00 ,  G06F15/177 ,  G06F17/50 ,  G06F19/00 ,  H03F3/45

CPC classification number: G06F1/26

Abstract: A voltage reference is dynamically and digitally controlled by a digital function. The digital function may be implemented as a digital calculation or look up table. Inputs to the function include a modifiable trim value stored in a trim register, and a substrate temperature value. The preset value of the trim register is a trim preset value generated by cutting fuses and/or leaving fuses uncut. The cutting may be performed using laser trimming-devices. The output of the digital function is a corrected reference trim value that controls the gain of a voltage reference amplifier whose input is a band gap based voltage reference, and whose output is a derived voltage reference. The substrate temperature value is provided by a monolithic temperature monitor whose sensor may be on the same die as the derived voltage reference. The derived voltage reference provides a stable reference voltage that is dynamically and digitally controllable, to a host system that requires a voltage reference.

Abstract translation: 电压参考值由数字功能动态和数字控制。 数字功能可以被实现为数字计算或查找表。 对功能的输入包括存储在修剪寄存器中的可修改修整值和衬底温度值。 修剪寄存器的预设值是通过切断保险丝和/或保留未熔断器产生的修整预设值。 可以使用激光修整装置进行切割。 数字功能的输出是校正的参考调整值，其控制输入是基于带隙的参考电压并且其输出是导出电压基准的参考放大器的增益。 衬底温度值由单片温度监测器提供，其传感器可以在与导出的电压基准相同的管芯上。 导出的电压基准提供动态和数字可控的稳定的参考电压到需要电压参考的主机系统。

公开(公告)号：US06874327B1

公开(公告)日：2005-04-05

申请号：US10724927

申请日：2003-12-01

Applicant: Richard E. Wahler ,  Eileen M. Marando ,  Steven Burstein ,  Wayne A. Miller

Inventor： Richard E. Wahler ,  Eileen M. Marando ,  Steven Burstein ,  Wayne A. Miller

IPC: F25D17/00 ,  G05B5/00 ,  H02P1/00 ,  H05K7/20

CPC classification number: H05K7/20209

Abstract: A system and method for increasing resolution of pulse width modulated (PWM) signal duty cycle calculations in a fan speed control system operating to control rotational speed of at least one fan. The method may comprise obtaining a temperature reading from a first temperature sensor in the fan speed control system during a first time period. The temperature reading has resolution of a first number of bits. A portion of the first number of bits is selected for calculating a PWM signal duty cycle with the resolution of the first number of bits in the temperature reading using only the portion of the first number of bits and zone parameters associated with the first temperature sensor. The PWM signal duty cycle may then be converted into a PWM signal that may be provided to the at least one fan.

Abstract translation: 一种用于在风扇速度控制系统中增加脉宽调制（PWM）信号占空比计算分辨率的系统和方法，该风扇速度控制系统用于控制至少一个风扇的转速。 该方法可以包括在第一时间段期间从风扇速度控制系统中的第一温度传感器获得温度读数。 温度读数具有第一位数的分辨率。 选择第一位数的一部分，以仅使用与第一温度传感器相关联的第一位数和区域参数的部分来计算温度读数中的第一位数的分辨率的PWM信号占空比。 然后可以将PWM信号占空比转换成可以被提供给至少一个风扇的PWM信号。

公开(公告)号：US08154270B2

公开(公告)日：2012-04-10

申请号：US12371375

申请日：2009-02-13

Applicant: Jane Xu ,  Steven Burstein ,  Jay D. Popper

Inventor： Jane Xu ,  Steven Burstein ,  Jay D. Popper

IPC: G05F5/00

CPC classification number: H03K17/223

Abstract: An input protection circuit (IPC) may prevent an input signal from propagating into a system, such as an integrated circuit (IC), when the voltage level of the input signal exceeds a specified value. The IPC may be configured to compare the input signal voltage, which may be that of an external input signal received by the system, with a reference voltage, which may be the power supply voltage. If the input signal voltage exceeds the reference voltage, the output of the IPC may be set to the value of a specified clamp voltage. If the input signal voltage does not exceed the reference voltage, the output of the IPC may track (or follow) the input signal voltage. For certain integrated circuits, the IPC may be configured to provide circuit protection for an input signal voltage ranging between 0V to 5V, and a power supply voltage ranging between 3.0V and 3.6V.

Abstract translation: 当输入信号的电压电平超过指定值时，输入保护电路（IPC）可以防止输入信号传播到诸如集成电路（IC）的系统中。 IPC可以被配置为将输入信号电压（其可以是系统接收的外部输入信号的电压）与可以是电源电压的参考电压进行比较。 如果输入信号电压超过参考电压，则IPC的输出可以设置为指定钳位电压的值。 如果输入信号电压不超过参考电压，则IPC的输出可以跟踪（或跟随）输入信号电压。 对于某些集成电路，IPC可以配置为为0V至5V之间的输入信号电压和3.0V至3.6V之间的电源电压提供电路保护。

公开(公告)号：US08154053B2

公开(公告)日：2012-04-10

申请号：US12389568

申请日：2009-02-20

Applicant: Antonio S. Lopes ,  Steven Burstein

Inventor： Antonio S. Lopes ,  Steven Burstein

IPC: H01L27/118 ,  H01L25/00

CPC classification number: H03K19/177

Abstract: An integrated circuit may include one or more cells, with each cell comprising a first and a second input terminal, a first and a second output terminal, and a number of connection stages configured to couple each input terminal to a corresponding respective output terminal. The stages may include one stage per metal layer of the integrated circuit and one stage per VIA layer of the integrated circuit. Each stage may be configured with a pair of input ports and a pair of output ports. Each output port of a stage may serially connect to a corresponding respective input port of a first adjacent stage, and each input port of the stage may also serially connect to a corresponding respective output port of a second adjacent stage. The pair of input ports may also be configured to programmably connect to the pair of output ports within the same stage, according to one of two different connection patterns, to establish a respective connection within the stage. A combination of the respective connections within the stages may determine which input terminal of the cell connects to which output terminal of the cell.

Abstract translation: 集成电路可以包括一个或多个单元，每个单元包括第一和第二输入端，第一和第二输出端，以及多个连接级，被配置为将每个输入端耦合到对应的相应输出端。 这些级可以包括集成电路的每个金属层的一级和集成电路的每个VIA层的一级。 每一级可配置一对输入端口和一对输出端口。 级的每个输出端口可以串行连接到第一相邻级的对应的相应输入端口，并且级的每个输入端口也可以串行连接到第二相邻级的对应的相应输出端口。 一对输入端口还可以被配置为根据两种不同的连接模式中的一种可编程地连接到同一级中的一对输出端口，以在该级内建立相应的连接。 级内的相应连接的组合可以确定单元的哪个输入端连接到单元的哪个输出端。

公开(公告)号：US20100213515A1

公开(公告)日：2010-08-26

申请号：US12389568

申请日：2009-02-20

Applicant: Antonio S. Lopes ,  Steven Burstein

Inventor： Antonio S. Lopes ,  Steven Burstein

IPC: H01L23/535

CPC classification number: H03K19/177

Abstract: An integrated circuit may include one or more cells, with each cell comprising a first and a second input terminal, a first and a second output terminal, and a number of connection stages configured to couple each input terminal to a corresponding respective output terminal. The stages may include one stage per metal layer of the integrated circuit and one stage per VIA layer of the integrated circuit. Each stage may be configured with a pair of input ports and a pair of output ports. Each output port of a stage may serially connect to a corresponding respective input port of a first adjacent stage, and each input port of the stage may also serially connect to a corresponding respective output port of a second adjacent stage. The pair of input ports may also be configured to programmably connect to the pair of output ports within the same stage, according to one of two different connection patterns, to establish a respective connection within the stage. A combination of the respective connections within the stages may determine which input terminal of the cell connects to which output terminal of the cell.

Abstract translation: 集成电路可以包括一个或多个单元，每个单元包括第一和第二输入端，第一和第二输出端，以及多个连接级，被配置为将每个输入端耦合到对应的相应输出端。 这些级可以包括集成电路的每个金属层的一级和集成电路的每个VIA层的一级。 每一级可配置一对输入端口和一对输出端口。 级的每个输出端口可以串行连接到第一相邻级的对应的相应输入端口，并且级的每个输入端口也可以串行连接到第二相邻级的对应的相应输出端口。 一对输入端口还可以被配置为根据两种不同的连接模式中的一种可编程地连接到同一级中的一对输出端口，以在该级内建立相应的连接。 级内的相应连接的组合可以确定单元的哪个输入端连接到单元的哪个输出端。