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公开(公告)号:US20110090251A1
公开(公告)日:2011-04-21
申请号:US12904935
申请日:2010-10-14
申请人: Walter E. Donovan , Emmett M. Kilgariff , Steven E. Molnar , Christian Amsinck , Robert Ohannessian
发明人: Walter E. Donovan , Emmett M. Kilgariff , Steven E. Molnar , Christian Amsinck , Robert Ohannessian
IPC分类号: G09G5/00
CPC分类号: G06T15/503 , G06T15/005 , G09G5/363 , G09G5/393 , G09G2360/123
摘要: One embodiment of the present invention sets forth a technique for converting alpha values into pixel coverage masks. Geometric coverage is sampled at a number of “real” sample positions within each pixel. Color and depth values are computed for each of these real samples. Fragment alpha values are used to determine an alpha coverage mask for the real samples and additional “virtual” samples, in which the number of bits set in the mask bits is proportional to the alpha value. An alpha-to-coverage mode uses the virtual samples to increase the number of transparency levels for each pixel compared with using only real samples. The alpha-to-coverage mode may be used in conjunction with virtual coverage anti-aliasing to provide higher-quality transparency for rendering anti-aliased images.
摘要翻译: 本发明的一个实施例提出了一种将α值转换为像素覆盖掩码的技术。 在每个像素内的多个“实”样本位置采样几何覆盖。 为这些实际样本中的每一个计算颜色和深度值。 片段α值用于确定实际样本和附加“虚拟”样本的alpha覆盖掩码,其中掩码位中设置的位数与alpha值成比例。 与仅使用真实样本相比,alpha到覆盖模式使用虚拟样本来增加每个像素的透明度级别数。 alpha到覆盖模式可以与虚拟覆盖抗锯齿一起使用,以提供用于渲染抗锯齿图像的更高质量的透明度。
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公开(公告)号:US09697641B2
公开(公告)日:2017-07-04
申请号:US12904927
申请日:2010-10-14
申请人: Steven E. Molnar , Emmett M. Kilgariff , Walter E. Donovan , Christian Amsinck , Robert Ohannessian
发明人: Steven E. Molnar , Emmett M. Kilgariff , Walter E. Donovan , Christian Amsinck , Robert Ohannessian
CPC分类号: G06T15/503 , G06T15/005 , G09G5/363 , G09G5/393 , G09G2360/123
摘要: One embodiment of the present invention sets forth a technique for converting alpha values into pixel coverage masks. Geometric coverage is sampled at a number of “real” sample positions within each pixel. Color and depth values are computed for each of these real samples. Fragment alpha values are used to determine an alpha coverage mask for the real samples and additional “virtual” samples, in which the number of bits set in the mask bits is proportional to the alpha value. An alpha-to-coverage mode uses the virtual samples to increase the number of transparency levels for each pixel compared with using only real samples. The alpha-to-coverage mode may be used in conjunction with virtual coverage anti-aliasing to provide higher-quality transparency for rendering anti-aliased images.
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公开(公告)号:US08669999B2
公开(公告)日:2014-03-11
申请号:US12904935
申请日:2010-10-14
申请人: Walter E. Donovan , Emmett M. Kilgariff , Steven E. Molnar , Christian Amsinck , Robert Ohannessian
发明人: Walter E. Donovan , Emmett M. Kilgariff , Steven E. Molnar , Christian Amsinck , Robert Ohannessian
IPC分类号: G09G5/00
CPC分类号: G06T15/503 , G06T15/005 , G09G5/363 , G09G5/393 , G09G2360/123
摘要: One embodiment of the present invention sets forth a technique for converting alpha values into pixel coverage masks. Geometric coverage is sampled at a number of “real” sample positions within each pixel. Color and depth values are computed for each of these real samples. Fragment alpha values are used to determine an alpha coverage mask for the real samples and additional “virtual” samples, in which the number of bits set in the mask bits is proportional to the alpha value. An alpha-to-coverage mode uses the virtual samples to increase the number of transparency levels for each pixel compared with using only real samples. The alpha-to-coverage mode may be used in conjunction with virtual coverage anti-aliasing to provide higher-quality transparency for rendering anti-aliased images.
摘要翻译: 本发明的一个实施例提出了一种将α值转换为像素覆盖掩码的技术。 在每个像素内的多个“实”样本位置采样几何覆盖。 为这些实际样本中的每一个计算颜色和深度值。 片段α值用于确定实际样本和附加“虚拟”样本的alpha覆盖掩码,其中掩码位中设置的位数与alpha值成比例。 与仅使用真实样本相比,alpha到覆盖模式使用虚拟样本来增加每个像素的透明度级别数。 alpha到覆盖模式可以与虚拟覆盖抗锯齿一起使用,以提供用于渲染抗锯齿图像的更高质量的透明度。
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公开(公告)号:US08564616B1
公开(公告)日:2013-10-22
申请号:US12505402
申请日:2009-07-17
申请人: Ziyad S. Hakura , John Erik Lindholm , Emmett M. Kilgariff , Robert Ohannessian , Scott R. Whitman , James C. Bowman , Patrick R. Brown , Ross A. Cunniff
发明人: Ziyad S. Hakura , John Erik Lindholm , Emmett M. Kilgariff , Robert Ohannessian , Scott R. Whitman , James C. Bowman , Patrick R. Brown , Ross A. Cunniff
IPC分类号: G09G5/00
CPC分类号: G09G5/363 , G09G2360/08 , G09G2370/10
摘要: One embodiment of the invention sets forth a mechanism for compiling a vertex shader program into two portions, a culling portion and a shading portion. The culling portion of the compiled vertex shader program specifies vertex attributes and instructions of the vertex shader program needed to determine whether early vertex culling operations should be performed on a batch of vertices associated with one or more primitives of a graphics scene. The shading portion of the compiled vertex shader program specifies the remaining vertex attributes and instructions of the vertex shader program for performing vertex lighting and performing other operations on the vertices in the batch of vertices. When the compiled vertex shader program is executed by graphics processing hardware, the shading portion of the compiled vertex shader is executed only when early vertex culling operations are not performed on the batch of vertices.
摘要翻译: 本发明的一个实施例提出了一种用于将顶点着色器程序编译成两部分,一个剔除部分和一个阴影部分的机构。 编译的顶点着色器程序的剔除部分指定顶点着色器程序的顶点属性和指令,以确定是否应对与图形场景的一个或多个图元相关联的一批顶点执行早期顶点剔除操作。 编译顶点着色器程序的阴影部分指定顶点着色器程序的剩余顶点属性和指令,用于执行顶点点亮,并对顶点的顶点中的顶点执行其他操作。 当编译的顶点着色器程序由图形处理硬件执行时,只有在不对顶点顶点执行早期顶点剔除操作时才执行编译顶点着色器的阴影部分。
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公开(公告)号:US08542247B1
公开(公告)日:2013-09-24
申请号:US12505398
申请日:2009-07-17
申请人: Ziyad S. Hakura , John Erik Lindholm , Emmett M. Kilgariff , Robert Ohannessian , Scott R. Whitman , James C. Bowman , Patrick R. Brown , Ross A. Cunniff
发明人: Ziyad S. Hakura , John Erik Lindholm , Emmett M. Kilgariff , Robert Ohannessian , Scott R. Whitman , James C. Bowman , Patrick R. Brown , Ross A. Cunniff
IPC分类号: G09G5/00
CPC分类号: G06T15/005 , G06T15/40 , G09G5/363 , G09G5/393 , G09G2360/06 , G09G2360/08
摘要: One embodiment of the invention sets forth a mechanism for compiling a vertex shader program into two portions, a culling portion and a shading portion. The culling portion of the compiled vertex shader program specifies vertex attributes and instructions of the vertex shader program needed to determine whether early vertex culling operations should be performed on a batch of vertices associated with one or more primitives of a graphics scene. The shading portion of the compiled vertex shader program specifies the remaining vertex attributes and instructions of the vertex shader program for performing vertex lighting and performing other operations on the vertices in the batch of vertices. When the compiled vertex shader program is executed by graphics processing hardware, the shading portion of the compiled vertex shader is executed only when early vertex culling operations are not performed on the batch of vertices.
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公开(公告)号:US20130124838A1
公开(公告)日:2013-05-16
申请号:US13294045
申请日:2011-11-10
申请人: Lacky V. SHAH , Gregory Scott Palmer , Gernot Schaufler , Samuel H. Duncan , Philip Browning Johnson , Shirish Gadre , Robert Ohannessian , Nicholas Wang , Christopher Lamb , Philip Alexander Cuadra , Timothy John Purcell
发明人: Lacky V. SHAH , Gregory Scott Palmer , Gernot Schaufler , Samuel H. Duncan , Philip Browning Johnson , Shirish Gadre , Robert Ohannessian , Nicholas Wang , Christopher Lamb , Philip Alexander Cuadra , Timothy John Purcell
IPC分类号: G06F9/38
CPC分类号: G06F9/461
摘要: One embodiment of the present invention sets forth a technique instruction level and compute thread array granularity execution preemption. Preempting at the instruction level does not require any draining of the processing pipeline. No new instructions are issued and the context state is unloaded from the processing pipeline. When preemption is performed at a compute thread array boundary, the amount of context state to be stored is reduced because execution units within the processing pipeline complete execution of in-flight instructions and become idle. If, the amount of time needed to complete execution of the in-flight instructions exceeds a threshold, then the preemption may dynamically change to be performed at the instruction level instead of at compute thread array granularity.
摘要翻译: 本发明的一个实施例阐述了技术指令级别和计算线程数组粒度执行抢占。 在指令级别抢占不需要处理管道的任何排水。 不会发出新的指令,并且从处理流水线中卸载上下文状态。 当在计算线程数组边界执行抢占时,由于处理流程内的执行单元完成飞行中指令的执行并变为空闲,因此减少了要存储的上下文状态量。 如果完成执行飞行中指令所需的时间超过阈值,则抢占可以动态地改变以在指令级别而不是以计算线程数组粒度来执行。
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